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74AUP1G97L6X 数据表(PDF) 3 Page - Fairchild Semiconductor |
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74AUP1G97L6X 数据表(HTML) 3 Page - Fairchild Semiconductor |
3 / 11 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AUP1G97 • 1.0.5 3 Function Table Inputs 74AUP1G97 C B A Y=Output L L L L L L H L L H L H L H H H H L L L H L H H H H L L H H H H H = HIGH Logic Level L = LOW Logic Level Function Selection Table 2-Input Logic Function Connection Configuration 2-to-1 MUX Figure 3 2-Input AND Gate Figure 4 2-Input OR Gate with One Inverted Input Figure 5 2-Input NAND Gate with One Inverted Input Figure 5 2-Input AND Gate with One Inverted Input Figure 6 2-Input NOR Gate with One Inverted Input Figure 6 2-Input OR Gate Figure 7 Inverter Figure 8 Buffer Figure 9 |
类似零件编号 - 74AUP1G97L6X |
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类似说明 - 74AUP1G97L6X |
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