– 9 –

CXA1786N

FC: High or open

Do1 (2)

φR

φP

TEST Do1 (2)

φR

φP

TEST

FC: Low

fr > fp

fr = fp

fr < fp

H

Z

L

L

L

H

L

H

H

fr

fr

fr

L

Z

H

H

L

L

H

H

L

fp

fp

fp

2. Power Save Pin (PS)

This pin is left High when it is open and in power saving mode at Low.

All circuits except for reference counter latch and pulse swallow programmable counter latch are set to off in

the power saving mode. At that mode, Do1 and Do2 are high impedance and the data cannot be set.

∗ The data of reference counter and programmable counter are hold in power saving mode.

3. Do1 and Do2 Pins

These are the charge pump output pins. Do1 operates always. Do2 operates only when the LAT pin is High ; it

is in high impedance state when the LAT pin is Low.

4. FC Pin

This pin switches the charge pump outputs (Do1, Do2) and the phases of phase comparator outputs (

φP, φR).

(Refer to the Table 1.)

5. TEST Pin

This pin is for monitoring the counter output signal. The reference counter output and the pulse swallow

programmable counter output are switched according to the FC state as shown at Table 1.

This pin is emitter follower output High level = Vcc – Vf and Low level = Vcc – Vf – 200mV (200mV amplitude).

The DC bias current is decreased to save the power consumption so that the amplitude may not be monitored

for monitoring the waveforms with oscilloscope. In that case, connect the TEST pin to ground with an

approximately 5k

Ω resistor.

∗ Z: High impedance

fr: Output frequency of reference counter

H: High

fp: Output frequency of programmable counter

L: Low

Table 1. Phase comparator and TEST Pin outputs