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CXA1396D 数据表(PDF) 7 Page - Sony Corporation |
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CXA1396D 数据表(HTML) 7 Page - Sony Corporation |
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7 / 22 page  – 7 – CXA1396D Electrical Characteristics (Ta = 25°C, AVEE = DVEE = –5.2V, VRT = 0V, VRB = –2V) Item Resolution DC characteristics Integral linearity error Differential linearity error Analog input Analog input capacitance Analog input resistance Input bias current Reference inputs Reference resistance Offset voltage VRT VRB Digital inputs Logic H level Logic L level Logic H current Logic L current Input capacitance Switching characteristics Maximum conversion rate Aperture jitter Sampling delay Output delay H pulse width of clock L pulse width of clock Digital outputs Logic H level Logic L level Output rising time Output falling time Dynamic characteristics Input bandwidth S/N ratio Error rate Differential gain error Differential phase error Power supply Supply current Power consumption∗2 n EIL EDL CIN RIN IIN RREF EOT EOB VIH VIL IIH IIL Fc Taj Tds Tdo TPW1 TPW0 VOH VOL Tr Tf DG DP IEE Pd Fc = 125MSPS Fc = 125MSPS VIN = –1V + 0.07Vrms VIN = –1V Input connected to –0.8V Input connected to –1.6V Error rate 10–9 TPS∗1 RL = 50 Ω to –2V RL = 50 Ω to –2V RL = 50 Ω to –2V, 20% to 80% RL = 50 Ω to –2V, 80% to 20% VIN = 2Vp-p, 3dB down Input = 1MHz, FS Clock = 125MHz Input = 31.5MHz, FS Clock = 125MHz Input = 31.249MHz, FS Error > 16LSB Clock = 125MHz NTSC 40IRE mod.ramp, Fc = 125MSPS 75 8 0 –1.13 0 –50 125 3.0 4.0 4.0 –1.10 200 –230 8 ±0.3 ±0.3 17 190 130 110 19 15 7 10 1.5 3.6 0.8 1.0 46 40 1.0 0.5 –160 870 ±0.5 ±0.5 320 155 32 24 –1.50 50 50 4.2 –1.62 10–9 bits LSB LSB pF k Ω µA Ω mV mV V V µA µA pF MSPS ps ns ns ns ns V V ns ns MHz dB dB TPS∗1 % deg mA mW Symbol Condition Min. Typ. Max. Unit { { } { ∗1 TPS: times Per Sample ∗2 Pd = I EE • VEE + RREF (VRT – VRB)2 |
类似零件编号 - CXA1396D |
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类似说明 - CXA1396D |
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