TPA3100D2-Q1

TERMINAL FUNCTIONS (continued)

TERMINAL

I/O

DESCRIPTION

NAME

NO.

RINP

3

I

Positive audio input for right channel. Biased at VREG/2.

ROSC

14

I/O

I/O for current setting resistor of ramp generator

ROUTN

39, 40

O

Class-D 1/2-H-bridge negative output for right channel

ROUTP

41, 42

O

Class-D 1/2-H-bridge positive output for right channel

Shutdown signal for IC (LOW = disabled, HIGH = operational). TTL logic levels with

SHUTDOWN

44

I

compliance to AVCC.

Clock input/output for synchronizing multiple class-D devices. Direction determined by

SYNC

11

I/O

MSTR/SLV terminal. Input signal not to exceed VREG.

Reference for preamplifier. Nominally equal to 1.25 V. Also controls start-up time via external

VBYP

16

O

capacitor sizing.

VCLAMPL

30

Internally generated voltage supply for left channel bootstrap capacitor

VCLAMPR

31

Internally generated voltage supply for right channel bootstrap capacitor

4-V regulated output for use by internal cells, GAINx, MUTE, and MSTR/SLV pins only. Not

VREG

15

O

specified for driving other external circuitry.

Connect to AGND and PGND. Should be star point for both grounds. Internal resistive

connection to AGND and PGND. Thermal vias on the PCB should connect this pad to a

Thermal Pad

large copper area on an internal or bottom layer for the best thermal performance. The

Thermal Pad must be soldered to the PCB for mechanical reliability.

Copyright © 2008, Texas Instruments Incorporated

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