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LF351N 数据表(PDF) 4 Page - Texas Instruments

部件名 LF351N
功能描述  LF351 Wide Bandwidth JFET Input Operational Amplifier
Download  14 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

LF351N 数据表(HTML) 4 Page - Texas Instruments

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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
±18V
Power Dissipation (Notes 2, 7)
670 mW
Operating Temperature Range
0˚C to +70˚C
T
j(MAX)
115˚C
Differential Input Voltage
±30V
Input Voltage Range (Note 3)
±15V
Output Short Circuit Duration
Continuous
Storage Temperature Range
−65˚C to +150˚C
Lead Temp. (Soldering, 10 sec.)
Metal Can
300˚C
DIP
260˚C
θ
jA
N Package
120˚C/W
M Package
TBD
Soldering Information
Dual-In-Line Package
Soldering (10 sec.)
260˚C
Small Outline Package
Vapor Phase (60 sec.)
215˚C
Infrared (15 sec.)
220˚C
See AN-450 “Surface Mounting Methods and Their Effect on
Product Reliability” for other methods of soldering surface
mount devices.
ESD rating to be determined
DC Electrical Characteristics (Note 4)
Symbol
Parameter
Conditions
LF351
Units
Min
Typ
Max
V
OS
Input Offset Voltage
R
S = 10 kΩ,TA = 25˚C
5
10
mV
Over Temperature
13
mV
∆V
OS/∆T
Average TC of Input Offset
R
S=10 kΩ
10
µV/˚C
Voltage
I
OS
Input Offset Current
T
j = 25˚C, (Notes 4, 5)
25
100
pA
T
j ≤ 70˚C
4
nA
I
B
Input Bias Current
T
j = 25˚C, (Notes 4, 5)
50
200
pA
T
j ±70˚C
8
nA
R
IN
Input Resistance
T
j=25˚C
10
12
A
VOL
Large Signal Voltage Gain
V
S= ±15V, TA=25˚C
25
100
V/mV
V
O= ±10V, RL=2kΩ
Over Temperature
15
V/mV
V
O
Output Voltage Swing
V
S= ±15V, RL=10 kΩ
±12
±13.5
V
V
CM
Input Common-Mode Voltage
+15
V
Range
V
S= ±15V
±11
−12
V
CMRR
Common-Mode Rejection Ratio
R
S≤10 kΩ
70
100
dB
PSRR
Supply Voltage Rejection Ratio
(Note 6)
70
100
dB
I
S
Supply Current
1.8
3.4
mA
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func-
tional, but do not guarantee specific performance limits.
Note 2: For operating at elevated temperature, the device must be derated based on the thermal resistance,
θJA.
Note 3: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.
Note 4: These specifications apply for VS=±15V and 0˚C≤TA≤+70˚C. VOS,IB and IOS are measured at VCM=0.
Note 5: The input bias currents are junction leakage currents which approximately double for every 10˚C increase in the junction temperature, Tj. Due to the limited
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient
temperature as a result of internal power dissipation, PD.Tj=TAjA PD where θjA is the thermal resistance from junction to ambient. Use of a heat sink is recom-
mended if input bias current is to be kept to a minimum.
Note 6: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice. From
±15V to ±5V.
Note 7: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate outside
guaranteed limits.
3
www.national.com
PrintDate=1998/04/07 PrintTime=13:52:34 38265 ds005648 Rev. No. 3
cmserv
Proof
3


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