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SL74LV14D 数据表(PDF) 3 Page - System Logic Semiconductor |
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SL74LV14D 数据表(HTML) 3 Page - System Logic Semiconductor |
3 / 6 page SL74LV14 3 System Logic Semiconductor SLS DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Guaranteed Limit 25 °C -40 °C ÷ 85°C -40 °C ÷ 125°C Symbol Parameter Test Conditions VCC V min max min max min max Unit VIT+ Positive-Going Input Threshold Voltage VO ≥ V OH 1.2 2.0 2.7 3.0 3.6 4.5 5.5 0.45 0.85 1.05 1.25 1.55 1.75 2.15 0.95 1.35 1.95 2.15 2.35 3.10 3.80 0.4 0.8 1.0 1.2 1.5 1.7 2.1 1.0 1.4 2.0 2.2 2.4 3.15 3.85 0.4 0.8 1.0 1.2 1.5 1.7 2.1 1.0 1.4 2.0 2.2 2.4 3.15 3.85 V VIT- Negative-Going Input Threshold Voltage VO ≤ V OL 1.2 2.0 2.7 3.0 3.6 4.5 5.5 0.2 0.35 0.45 0.65 0.85 0.95 1.15 0.65 0.85 1.35 1.45 1.75 1.95 1.15 0.15 0.3 0.4 0.6 0.8 0.9 1.1 0.7 0.9 1.4 1.5 1.8 2.0 2.26 0.15 0.3 0.4 0.6 0.8 0.9 1.1 0.7 0.9 1.4 1.5 1.8 2.0 2.26 V VH Hysteresis Voltage VO ≥ V OH VO ≤ V OL 1.2 2.0 2.7 3.0 3.6 4.5 5.5 0.2 0.25 0.35 0.45 0.45 0.45 0.65 0.65 0.75 1.05 1.15 1.15 1.35 1.45 0.15 0.3 0.4 0.6 0.8 0.9 1.1 0.7 0.9 1.4 1.5 1.8 2.0 2.6 0.15 0.3 0.4 0.6 0.8 0.9 1.1 0.7 0.9 1.4 1.5 1.8 2.0 2.6 V VOH High-Level Output Voltage VI = VIH –or VIL IO = -100 µA 1.2 2.0 2.7 3.0 3.6 4.5 5.5 1.05 1.85 2.55 2.85 3.45 4.35 5.35 - - - - - - - 1.0 1.8 2.5 2.8 3.4 4.3 5.3 - - - - - - - 1.0 1.8 2.5 2.8 3.4 4.3 5.3 - - - - - - - V VI = VIH –or VIL IO = -6.0 mA 3.0 2.48 - 2.40 - 2.20 - VOH High-Level Output Voltage VI = VIH –or VIL IO = -12.0 mA 4.5 3.70 - 3.60 - 3.50 - V VOL Low-Level Output Voltage VI = VIH –or VIL IO = 100 µA 1.2 2.0 2.7 3.0 3.6 4.5 5.5 - - - - - - - 0.15 0.15 0.15 0.15 0.15 0.15 0.15 - - - - - - - 0.2 0.2 0.2 0.2 0.2 0.2 0.2 - - - - - - - 0.2 0.2 0.2 0.2 0.2 0.2 0.2 V |
类似零件编号 - SL74LV14D |
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类似说明 - SL74LV14D |
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