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DAC34SH84 数据表(PDF) 11 Page - Texas Instruments |
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DAC34SH84 数据表(HTML) 11 Page - Texas Instruments |
11 / 77 page DAC34SH84 www.ti.com SLAS808B – FEBRUARY 2012 – REVISED JULY 2012 ELECTRICAL CHARACTERISTICS – DIGITAL SPECIFICATIONS (continued) over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT DIGITAL INPUT TIMING SPECIFICATIONS Timing LVDS inputs: DAB[15:0]P/N, DCD[15:0]P/N, ISTRP/N, SYNCP/N, PARITYCDP/N, double edge latching Config36 Setting datadly clkdly 0 0 30 0 1 –10 0 2 –50 0 3 –90 Setup time, 0 4 –130 DAB[15:0]P/N, 0 5 –170 DCD[15:0]P/N, ISTRP/N and SYNCP/N reset latched ts(DATA) ISTRP/N, SYNCP/N, 0 6 –210 ps only on rising edge of DATACLKP/N and PARITYCDP/N, 0 7 –250 valid to either edge of 1 0 50 DATACLKP/N 2 0 90 3 0 130 4 0 170 5 0 210 6 0 250 7 0 290 Config36 Setting datadly clkdly 0 0 200 0 1 240 0 2 280 0 3 320 Hold time, 0 4 360 DAB[15:0]P/N, 0 5 400 DCD[15:0]P/N, ISTRP/N and SYNCP/N reset latched th(DATA) ISTRP/N, SYNCP/N 0 6 440 ps only on rising edge of DATACLKP/N and PARITYCDP/N 0 7 480 valid after either edge 1 0 190 of DATACLKP/N 2 0 150 3 0 110 4 0 70 5 0 30 6 0 –10 7 0 –50 ISTRP/N and 1 / t(ISTR_SYNC) SYNCP/N pulse fDATACLK is DATACLK frequency in MHz ns 2fDATACLK duration Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): DAC34SH84 |
类似零件编号 - DAC34SH84 |
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类似说明 - DAC34SH84 |
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