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DAC716PG4 数据表(PDF) 4 Page - Texas Instruments |
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DAC716PG4 数据表(HTML) 4 Page - Texas Instruments |
4 / 16 page 4 ® DAC716 TIMING SPECIFICATIONS TA = –40°C to +85°C, +VCC = +15V, –VCC = –15V. SYMBOL PARAMETER MIN MAX UNITS t CLK Data Clock Period 100 ns tCL Clock LOW 50 ns tCH Clock HIGH 50 ns tA0S Setup Time for A0 50 ns t A1S Setup Time for A 1 50 ns tAOH Hold Time for A0 10 ns tA1H Hold Time for A1 10 ns tDS Setup Time for DATA 50 ns t DH Hold Time for DATA 10 ns tDSOP Output Propagation Delay 140 ns tCP Clear Pulsewidth 200 ns A0 A1 CLK CLR DESCRIPTION 01 1 → 0 → 1 1 Shift Serial Data into SDI 10 1 → 0 → 1 1 Load D/A Latch 11 1 → 0 → 1 1 No Change 00 1 → 0 → 1 1 Two Wire Operation(1) X X 1 1 No Change X X X 0 Reset D/A Latch NOTES: X = Don’t Care. (1) All digital input changes will appear at the D/A output. TRUTH TABLE TIMING DIAGRAMS Serial Data In Serial Data Out CLK A 0 SDO Serial Data Out t A0H t A0S D 0 D 14 D 15 t CLK t CH t CL t DS t DSOP t DSOP CLK A 0 SDI Serial Data Input MSB First Latch Data In D/A Latch A 1 t A0H D 0 D 14 D 15 t A1S t A1H t DH t DS t A0S t CLK t CP t CH t CL CLR |
类似零件编号 - DAC716PG4 |
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类似说明 - DAC716PG4 |
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