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DAC715P 数据表(PDF) 9 Page - Texas Instruments |
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DAC715P 数据表(HTML) 9 Page - Texas Instruments |
9 / 14 page 9 ® DAC715 R 3 is a low-resistance ground plane or conductor. In this case you may wish to connect DCOM to SYSTEM GROUND as well. GAIN AND OFFSET ADJUST Connections Using Potentiometers GAIN and OFFSET adjust pins provide for trim using external potentiometers. 15-turn potentiometers provide suf- ficient resolution. Range of adjustment of these trims is at least ±0.3% of Full Scale Range. Refer to Figure 6. Using D/A Converters The GAIN ADJUST and OFFSET ADJUST circuits of the DAC715 have been arranged so that these points may be easily driven by external D/A converters. Refer to Figure 7. 12-bit D/A converters provide an OFFSET adjust resolution and a GAIN adjust resolution of 30 µV to 50µV per LSB step. Nominal values of GAIN and OFFSET occur when the D/A converters outputs are at approximately half scale, 0V. DIGITAL INTERFACE BUS INTERFACE The DAC715 has a 16-bit double-buffered data interface with control lines for easy connection to a 16-bit bus. The double-buffered feature permits update of several D/As simultaneously. A 0 is the enable control for the DATA INPUT LATCH. A1 is the enable for the D/A LATCH. WR is used to strobe data into latches enabled by A 0, and A1. Refer to the block diagram of Figure 1 and to Timing Diagram on page 3. CLR sets the INPUT DATA LATCH and D/A LATCH to 0000 H (5V at the D/A output). SINGLE-BUFFERED OPERATION FIGURE 5. System Ground Considerations for High-Resolution D/A Converters. R 1 Sense Output R L R 2 R 3 Alternate Ground Sense Connection System Ground ACOM DCOM Bus Interface DAC715 Analog Power Supply 0.01µF (1) 0.01µF To +V CC To –V CC NOTE: (1) Locate close to DAC715 package. V OUT 5k Ω 10k Ω V REF |
类似零件编号 - DAC715P |
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类似说明 - DAC715P |
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