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SL4520BN 数据表(PDF) 4 Page - System Logic Semiconductor |
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SL4520BN 数据表(HTML) 4 Page - System Logic Semiconductor |
4 / 5 page SL4520B System Logic Semiconductor SLS AC ELECTRICAL CHARACTERISTICS(C L=50pF, RL=200k Ω, Input t r=tf=20 ns) VCC Guaranteed Limit Symbol Parameter V ≥-55°C 25 °C ≤125°C Unit fmax Maximum ClockFrequency, (Figure 1) 5.0 10 15 1.5 3 4 1.5 3 4 0.75 1.5 2 MHz tPHL, tPLH Maximum Propagation Delay, Clock or Enable to Output (Figures 1,3) 5.0 10 15 560 230 160 560 230 160 1120 460 320 ns tPHL Maximum Propagation Delay, Reset to Output (Figure 2) 5.0 10 15 650 225 170 650 225 170 1300 450 340 ns tTHL, tTLH Maximum Output Transition Time, Any Output (Figure 1) 5.0 10 15 200 100 80 200 100 80 400 200 160 ns CIN Maximum Input Capacitance - 7.5 pF TIMING REQUIREMENTS(C L=50pF, RL=200 k Ω, Input t r=tf=20 ns) VCC Guaranteed Limit Symbol Parameter V ≥-55°C 25 °C ≤125°C Unit tw Minimum Pulse Width, Clock (Figure 1) 5.0 10 15 200 100 70 200 100 70 400 200 140 ns tw Minimum Pulse Width, Reset (Figure 2) 5.0 10 15 250 110 80 250 110 80 500 220 160 ns tw Minimum Pulse Width, Enable (Figure 3) 5.0 10 15 400 200 140 400 200 140 800 400 280 ns tr, tf MaximumInput Rise and Fall Times (Figure 1) 5.0 10 15 15 5 5 15 5 5 15 5 5 µs Figure 1. Switching Waveforms Figure 2. Switching Waveforms |
类似零件编号 - SL4520BN |
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类似说明 - SL4520BN |
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