数据搜索系统,热门电子元器件搜索 |
|
DM8603EP 数据表(PDF) 8 Page - Davicom Semiconductor, Inc. |
|
DM8603EP 数据表(HTML) 8 Page - Davicom Semiconductor, Inc. |
8 / 107 page DM8603 10/100 Mbps 3-port Ethernet Switch Controller with MII / RMII Interface Preliminary datasheet 8 DM8603-12-DS-P01 November 8, 2010 1. General Description The DM8603 is Davicom’s new fully integrated three-port 10M/100Mbps Fast Ethernet Controller. As a fast Ethernet switch, the DM8603 consists of two PHY ports and a third port with either MII or RMII interface. As the DM8603 was designed with our customers’ requirements in mind, the switch is optimized for high performance while being highly cost-effective. The two PHY ports on the DM8603 are IEEE 802.3u standards compliant. Aside for the first two PHY ports and in an effort for maximum application flexibility, the third port on the DM8603 offers the options to either connect with an MII, reversed MII, or RMII. The reversed MII configuration is used to connect with SoC’s with a MII interface. The RMII interface is the alternative interface configuration in case of the need to connect a lower pin count Ethernet PHY or SoC. To maximize the performance of each port, the DM8603 was designed with a number of features. For proper bandwidth, each port also supports ingress and/or egress rate control. In support of efficient packet forwarding, the DM8603 has port-based VLAN with tag/un-tag functions for up to 16 groups of 802.1Q. Each port includes MIB counters, loop-back capability, built in memory self test (BIST) for the system, and board level diagnostic. In designing for the requirements of various data, voice, and video applications, enough internal memory has been provided for usage of the DM8603’s three ports, and the internal memory supports up to 1K uni-cast MAC address table. Then to meet the demands of various bandwidth and latency issues in data, voice, and video applications, each port of the DM8603 has four priority transmit queues. These queues can be defined either through port-based operation, 802.1p VLAN, or the IP packet TOS field automatically. 2. Block Diagram 10/100M PHY Port 0 MDI / MDIX Port 1 MDI / MDIX Port 2 MII / RMII Switch Controller Control Registers MIB Counters EEPROM Interface Embedded Memory Memory BIST Memory Management Switch Engine LED Control LEDs EEPROM Switch Fabric SMI I/F 10/100M PHY 10/100M MAC 10/100M MAC 10/100M MAC |
类似零件编号 - DM8603EP |
|
类似说明 - DM8603EP |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |