数据搜索系统,热门电子元器件搜索 |
|
AD7606 数据表(PDF) 6 Page - Analog Devices |
|
AD7606 数据表(HTML) 6 Page - Analog Devices |
6 / 32 page AD7608 Data Sheet Rev. A | Page 6 of 32 TIMING SPECIFICATIONS AVCC = 4.75 V to 5.25 V, VDRIVE = 2.3 V to 5.25 V, VREF = 2.5 V external reference/internal reference, TA = TMIN to TMAX, unless otherwise noted.1 Table 3. Limit at TMIN, TMAX Parameter Min Typ Max Unit Description PARALLEL/SERIAL/BYTE MODE tCYCLE 1/throughput rate 5 µs Parallel mode, reading during or after conversion; or serial mode: VDRIVE = 3.3 V to 5.25 V, reading during a conversion using DOUTA and DOUTB lines 5 µs Serial mode reading during conversion; VDRIVE = 2.7 V 10.5 µs Serial mode reading after a conversion; VDRIVE = 2.3 V, DOUTA and DOUTB lines tCONV Conversion time 3.45 4 4.15 µs Oversampling off 7.87 9.1 µs Oversampling by 2 16.05 18.8 µs Oversampling by 4 33 39 µs Oversampling by 8 66 78 µs Oversampling by 16 133 158 µs Oversampling by 32 257 315 µs Oversampling by 64 tWAKE-UP STANDBY 100 µs EE AA rising edge to CONVST x rising edge; power-up time from standby mode STBY tWAKE-UP SHUTDOWN Internal Reference 30 ms AA STBYEE AA rising edge to CONVST x rising edge; power-up time from shutdown mode External Reference 13 ms AA STBYEE AA rising edge to CONVST x rising edge; power-up time from shutdown mode tRESET 50 ns RESET high pulse width tOS_SETUP 20 ns BUSY to OS x pin setup time tOS_HOLD 20 ns BUSY to OS x pin hold time t1 40 ns CONVST x high to BUSY high t2 25 ns Minimum CONVST x low pulse t3 25 ns Minimum CONVST x high pulse t4 0 ns BUSY falling edge to AA CSEE AA falling edge setup time t5 10F9F 2 0.5 ms Maximum delay allowed between CONVST A, CONVST B rising edges t6 25 ns Maximum time between last AA CSEE AA rising edge and BUSY falling edge t7 25 ns Minimum delay between RESET low to CONVST x high PARALLEL/BYTE READ OPERATION t8 0 ns AA CSEE AA to AA RDEE AA setup time t9 0 ns AA CSEE AA to AA RDEE AA hold time t10 AA RDEE AA low pulse width 16 ns VDRIVE above 4.75 V 21 ns VDRIVE above 3.3 V 25 ns VDRIVE above 2.7 V 32 ns VDRIVE above 2.3 V t11 15 ns AA RDEE AA high pulse width t12 22 ns AA CSEE AA high pulse width (see Figure 5); AA CSEE AA and AA RDEE AA linked |
类似零件编号 - AD7606 |
|
类似说明 - AD7606 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |