Si57x-EVB

8

Rev. 0.2

are pin and register compatible, and all Si571 and Si599 VCXOs are pin and register compatible. The device can

DUT's nominal supply voltage.

J2, and J11 pin 2. This defeats and bypasses the installed bidirectional voltage level translator at U3.

1.7. Si57x/598/599 Digital Control Signals

There is one normally static digital input control signal that routes to the Si57x/598/599: Output Enable or OE. By

default, the OE signal is pulled HIGH on the Si57x-EVB and may be pulled low by installing a jumper at J9.

To support OE active LOW control, make the following changes to the Si57x motherboard:



Install R9.



Remove R14.

You can then selectively disable the OE active LOW by installing a jumper at J3. See Figure 4 for the location of

these components.

1.8. Si57x/598/599 Voltage Control Signal

An external voltage control signal may be applied to the control voltage modulation input at SMA connector J17,

silkscreen designation VC_MOD). This voltage supplies the control voltage or voltage modulation input to an Si571

when installed on the DB. No jumper changes are required to support the Si570/598 versus the Si571/599. Pin 1