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74LVC1G74GN 数据表(PDF) 6 Page - NXP Semiconductors |
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74LVC1G74GN 数据表(HTML) 6 Page - NXP Semiconductors |
6 / 25 page 74LVC1G74 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 10 — 2 December 2011 6 of 25 NXP Semiconductors 74LVC1G74 Single D-type flip-flop with set and reset; positive edge trigger 8. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation. [3] For TSSOP8 packages: above 55 C the value of P tot derates linearly with 2.5 mW/K. For VSSOP8 packages: above 110 C the value of P tot derates linearly with 8.0 mW/K. For XSON8, XSON8U and XQFN8U packages: above 118 C the value of P tot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +6.5 V IIK input clamping current VI <0V 50 - mA VI input voltage [1] 0.5 +6.5 V IOK output clamping current VO >VCC or VO <0V - 50 mA VO output voltage Active mode [1] 0.5 VCC +0.5 V Power-down mode [1][2] 0.5 +6.5 V IO output current VO =0 VtoVCC - 50 mA ICC supply current - 100 mA IGND ground current 100 - mA Ptot total power dissipation Tamb = 40 C to +125 C [3] - 300 mW Tstg storage temperature 65 +150 C Table 7. Operating conditions Symbol Parameter Conditions Min Max Unit VCC supply voltage 1.65 5.5 V VI input voltage 0 5.5 V VO output voltage Active mode 0 VCC V Power-down mode; VCC =0V 0 5.5 V Tamb ambient temperature 40 +125 C t/V input transition rise and fall rate VCC = 1.65 V to 2.7 V - 20 ns/V VCC = 2.7 V to 5.5 V - 10 ns/V |
类似零件编号 - 74LVC1G74GN |
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类似说明 - 74LVC1G74GN |
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