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GS7032-CVM 数据表(PDF) 8 Page - Gennum Corporation |
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GS7032-CVM 数据表(HTML) 8 Page - Gennum Corporation |
8 / 9 page 14583 - 04 8 of 9 4. VCO CENTRE FREQUENCY SELECTION The recommended RVCO value for auto rate SMPTE 259M-C applications (270Mb/s) is 374 Ω (see the Typical Application Circuit). The VCO and an internal divider generate the PLL clock. 5. LOCK DETECT OUTPUT The Lock Detect output is available from pin 20 and is HIGH when the loop is locked. When the loop is not locked, the lock detect circuit mutes the serial data outputs. 6. SERIAL OUTPUTS The true and complement serial data, SDO and SDO, are available from pins 24 and 25. These outputs will drive two 75 Ω co-axial cables with SMPTE level serial digital video signals. RSET calculation: where RLOAD = RPULL-UP || ZO TYPICAL APPLICATION CIRCUIT R SET 1.154 R LOAD × V SDO --------------------------------------- = 33 32 31 30 29 28 27 26 25 24 23 1 2 3 4 5 6 7 8 9 10 11 GS7032 RESET NC BYPASS NC VEE NC NC VEE SDO SDO VEE PD9 PD8 PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0 PCLKIN VCC J3 J4 VCC VCC VCC VCC VCC 374 100n L R L R 1µ 1µ 75 75 100n 54.9 220 J1 LBWC 100n 100n 10k PARALLEL CLOCK INPUT PARALLEL DATA INPUTS L = 8.2nH R = 75 Ω LOCK All resistors on ohms, all capacitors in farads, unless otherwise stated. 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 RESET VCC |
类似零件编号 - GS7032-CVM |
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类似说明 - GS7032-CVM |
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