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ISL23428UFVZ 数据表(PDF) 1 Page - Intersil Corporation |
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ISL23428UFVZ 数据表(HTML) 1 Page - Intersil Corporation |
1 / 21 page 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas Inc. 2011. All Rights Reserved Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries. All other trademarks mentioned are the property of their respective owners Dual, 128-Tap, Low Voltage Digitally Controlled Potentiometer (XDCP™) ISL23428 The ISL23428 is a volatile, low voltage, low noise, low power, 128-tap, dual digitally controlled potentiometer (DCP) with an SPI Bus™ interface. It integrates two DCP cores, wiper switches and control logic on a monolithic CMOS integrated circuit. Each digitally controlled potentiometer is implemented with a combination of resistor elements and CMOS switches. The position of the wipers are controlled by the user through the SPI bus interface. Each potentiometer has an associated volatile Wiper Register (WRi, i = 0, 1) that can be directly written to and read by the user. The contents of the WRi controls the position of the wiper. When powered on, the wiper of each DCP will always commence at mid-scale (64 tap position). The low voltage, low power consumption, and small package of the ISL23428 make it an ideal choice for use in battery operated equipment. In addition, the ISL23428 has a VLOGIC pin allowing down to 1.2V bus operation, independent from the VCC value. This allows for low logic levels to be connected directly to the ISL23428 without passing through a voltage level shifter. The DCP can be used as a three-terminal potentiometer or as a two-terminal variable resistor in a wide variety of applications including control, parameter adjustments, and signal processing. Applications • Power supply margining • Trimming sensor circuits • Gain adjustment in battery powered instruments • RF power amplifier bias compensation Features • Two potentiometers per package •128 resistor taps •10k 50kor 100k total resistance • SPI serial interface - No additional level translator for low bus supply - Daisy Chaining of multiple DCPs •Power supply -VCC = 1.7V to 5.5V analog power supply -VLOGIC = 1.2V to 5.5V SPI bus/logic power supply • Maximum supply current without serial bus activity (standby) - 4µA @ VCC and VLOGIC = 5V - 1.7µA @ VCC and VLOGIC = 1.7V •Shutdown Mode - Forces the DCP into an end-to-end open circuit and RWi is connected to RLi internally - Reduces power consumption by disconnecting the DCP resistor from the circuit • Wiper resistance: 70 typical @ VCC = 3.3V • Power-on preset to mid-scale (64 tap position) • Extended industrial temperature range: -40°C to +125°C • 14 Ld TSSOP or 16 Ld UTQFN packages • Pb-free (RoHS compliant) FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP POSITION, 10kΩ DCP FIGURE 2. VREF ADJUSTMENT 0 2000 4000 6000 8000 10000 032 64 96 128 TAP POSITION (DECIMAL) VREF_M ISL28114 ISL23428 + - VREF RL RW RH August 25, 2011 FN7904.0 |
类似零件编号 - ISL23428UFVZ |
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类似说明 - ISL23428UFVZ |
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