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ISL23348UFRZ 数据表(PDF) 1 Page - Intersil Corporation

部件名 ISL23348UFRZ
功能描述  Quad, 128 Tap, Low Voltage Digitally Controlled Potentiometer (XDCP??
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

ISL23348UFRZ 数据表(HTML) 1 Page - Intersil Corporation

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners
Quad, 128 Tap, Low Voltage Digitally Controlled
Potentiometer (XDCP™)
ISL23348
The ISL23348 is a volatile, low voltage, low noise, low power,
128 tap, quad digitally controlled potentiometer (DCP) with an
I2C Bus™ interface. It integrates four DCP cores, wiper
switches and control logic on a monolithic CMOS integrated
circuit.
Each digitally controlled potentiometer is implemented with a
combination of resistor elements and CMOS switches. The
position of the wipers are controlled by the user through the
I2C bus interface. Each potentiometer has an associated
volatile Wiper Register (WRi, i = 0, 1, 2, 3) that can be directly
written to and read by the user. The contents of the WRi
controls the position of the wiper. When powered on, the wiper
of each DCP will always commence at mid-scale (64 tap
position).
The low voltage, low power consumption, and small package
of the ISL23348 make it an ideal choice for use in battery
operated equipment. In addition, the ISL23348 has a VLOGIC
pin allowing down to 1.2V bus operation, independent from the
VCC value. This allows for low logic levels to be connected
directly to the ISL23348 without passing through a voltage
level shifter.
The DCP can be used as a three-terminal potentiometer or as a
two-terminal variable resistor in a wide variety of applications
including control, parameter adjustments, and signal processing.
Applications
• Power supply margining
• Trimming sensor circuits
• Gain adjustment in battery powered instruments
• RF power amplifier bias compensation
Features
• Four potentiometers per package
•128 resistor taps
•10kΩ
, 50kΩ or 100kΩ total resistance
•I2C serial interface
- No additional level translator for low bus supply
- Three address pins allow up to eight devices per bus
• Maximum supply current without serial bus activity
(standby)
- 5µA @ VCC and VLOGIC = 5V
- 2µA @ VCC and VLOGIC = 1.7V
•Shutdown mode
- Forces the DCP into an end-to-end open circuit and RWi is
connected to RLi internally
- Reduces power consumption by disconnecting the DCP
resistor from the circuit
•Power supply
-VCC = 1.7V to 5.5V analog power supply
-VLOGIC = 1.2V to 5.5V I2C bus/logic power supply
• Wiper resistance: 70Ω typical @ VCC = 3.3V
• Power-on preset to mid-scale (64 tap position)
• Extended industrial temperature range: -40°C to +125°C
• 20 Ld TSSOP or 20 QFN packages
• Pb-free (RoHS compliant)
FIGURE 1. FORWARD AND BACKWARD RESISTANCE vs TAP
POSITION, 10kΩ DCP
FIGURE 2. VREF ADJUSTMENT
0
2000
4000
6000
8000
10000
032
64
96
128
TAP POSITION (DECIMAL)
VREF_M
ISL28114
1 DCP
OF
ISL23348
+
-
VREF
RL1
RW1
RH1
August 24, 2011
FN7903.1


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