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74LVC2G08GD 数据表(PDF) 5 Page - NXP Semiconductors |
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74LVC2G08GD 数据表(HTML) 5 Page - NXP Semiconductors |
5 / 21 page 74LVC2G08 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 9 — 20 October 2010 5 of 21 NXP Semiconductors 74LVC2G08 Dual 2-input AND gate 8. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal condition. [3] For TSSOP8 package: above 55 °C the value of P tot derates linearly at 2.5 mW/K. For VSSOP8 package: above 110 °C the value of P tot derates linearly at 8 mW/K. For XSON8, XSON8U and XQFN8U packages: above 118 °C the value of P tot derates linearly with 7.8 mW/K. 9. Recommended operating conditions Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage −0.5 +6.5 V VI input voltage [1] −0.5 +6.5 V VO output voltage Active mode [1] −0.5 VCC + 0.5 V Power-down mode [1][2] −0.5 +6.5 V IIK input clamping current VI <0V −50 - mA IOK output clamping current VO <0V or VO >VCC - ±50 mA IO output current VO =0VtoVCC - ±50 mA ICC supply current - 100 mA IGND ground current −100 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation Tamb = −40 °C to +125 °C [3] - 300 mW Table 6. Operating conditions Symbol Parameter Conditions Min Max Unit VCC supply voltage 1.65 5.5 V VI input voltage 0 5.5 V VO output voltage Active mode 0 VCC V Power-down mode 0 5.5 V Tamb ambient temperature −40 +125 °C Δt/ΔV input transition rise and fall rate VCC =1.65V to 2.7V - 20 ns/V VCC = 2.7 V to 5.5 V - 10 ns/V |
类似零件编号 - 74LVC2G08GD |
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类似说明 - 74LVC2G08GD |
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