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ISL54066IRUZ-T 数据表(PDF) 8 Page - Intersil Corporation |
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ISL54066IRUZ-T 数据表(HTML) 8 Page - Intersil Corporation |
8 / 14 page 8 FN6584.1 November 3, 2009 The ISL54066 is a dual single pole-single throw (SPST) analog switch that offers precise switching from a single 1.8V to 6.5V supply with low ON-resistance (1.5 Ω), high off-isolation, high speed operation (tON = 60ns, tOFF = 30ns) and negative signal swing capability. The device is especially well suited for portable battery powered equipment due to its low operating supply voltage (1.8V), low power consumption (30nA), and a tiny 1.8mmx1.4mm µTQFN package or a 3mmx3mm TDFN package. The low rON resistance and rON flatness provide very low insertion loss and signal distortion for applications that require signal switching with minimal interference by the switch. In additon, the ISL54066 uses a T-switch architecture to achieve superior off-isolation from the input to output of the switch. Input/Output Shunt Resistors The ISL54066 contains input and output shunts resistors on the switch terminals. On the INx pins, there are 10k Ω shunts to the GND1 pin. On the OUTx pins, there are 200k Ω shunts to the GND2 pin. The input shunts are designed to discharge voltage that may be built up on the input pins, such as DC offsets due to AC-coupled signals. The output shunts are designed to bleed off any charge that may accumulate on the output pins when the switch is turned off. To have the shunt resistors enabled, connect the GND1 and GND2 pins to GND3. The GND3 pin is the main ground of the ISL54066 IC. The shunt resistors can be disconnected from the IC by floating the appropriate GND1 and GND2 pin. Grounding Considerations For maximum off-isolation performance, it is recommended to follow a star ground configuration of the GNDx pins (see Figure 7). Grounding the GND1, GND2 and GND3 pins to a star ground ensures there are no cross conduction of ground currents between the ground pins, which effect the off-isolation capability of the switch. Supply Sequencing and Overvoltage Protection With any CMOS device, proper power supply sequencing is required to protect the device from excessive input currents which might permanently damage the IC. All I/O pins contain ESD protection diodes from the pin to V+ and to GND (see Figure 8). To prevent forward biasing these diodes, V+ must be applied before any input signals, and the input signal voltages must remain between (V+ - 6.5V) and V+. If these conditions cannot be guaranteed, then precautions must be implemented to prohibit the current and voltage at the logic pin and signal pins from exceeding the maximum ratings of the switch. The following two methods can be used to provided additional protection to limit the current in the event that the voltage at a logic pin or switch terminal goes above the V+ rail. Logic inputs can be protected by adding a 1k Ω resistor in series with the logic input (see Figure 8). The resistor limits the input current below the threshold that produces permanent damage. This method is not acceptable for the signal path inputs. Adding a series resistor to the switch input defeats the purpose of using a low rON switch. Alternatively, connecting external Schottky diodes from the V+ rail to the signal pins will shunt the fault current through the Schottky diode instead of through the internal ESD diodes, thereby protecting the switch. These Schottky diodes must be sized to handle the expected fault current.. Power-Supply Considerations The ISL54066 construction is typical of most single supply CMOS analog switches which have two supply pins: V+ and GND. V+ and GND provide the CMOS switch bias and sets their analog voltage limits. Unlike switches with a 5.5V maximum supply voltage, the ISL54066 have a 6.5V maximum supply voltage providing plenty of head room for the 10% tolerance of 5V supplies due to overshoot and noise spikes. The minimum recommended supply voltage is +1.8V. It is important to note that the input signal range, switching times, and on-resistance degrade at lower supply voltages. Refer to the “Electrical Specifications” tables, beginning on page 3 and “Typical Performance Curves”, beginning on page 10 for details. ISL54066 IN1 IN2 CTL1 GND3 VDD CTL2 V+ 0.1µF GND1 GND2 OUT1 OUT2 FIGURE 7. STAR GROUNDING CONFIGURATION GND VINx V+ LOGIC INPUTS VOUTx -RING +RING CLAMP 1k Ω FIGURE 8. OVERVOLTAGE PROTECTION ISL54066 |
类似零件编号 - ISL54066IRUZ-T |
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类似说明 - ISL54066IRUZ-T |
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