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ISL24202 数据表(PDF) 5 Page - Intersil Corporation |
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ISL24202 数据表(HTML) 5 Page - Intersil Corporation |
5 / 12 page ISL24202 5 FN7587.0 March 15, 2011 tH_REJ CTL High Pulse Rejection Width 20 µs tL_REJ CTL Low Pulse Rejection Width 20 µs tH_MIN CTL High Minimum Valid Pulse Width 200 µs tL_MIN CTL Low Minimum Valid Pulse Width 200 µs tMTC CTL Minimum Time Between Counts 10 µs VPROG CTL EEPROM Program Voltage (see Figure 9) 4.9 19 V tPROG CTL EEPROM Programming Signal Time 200 µs tH_PROP CTL High-to-Mid to OUT Propagation Time 65 µs tL_PROP CTL Low-to-Mid to OUT Propagation Time 65 µs NOTE: 6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design. Electrical Specifications Test Conditions: VDD = 3.3V, AVDD = 18V, RSET = 5kΩ, R1 = 10kΩ, R2 = 10kΩ, (See Figure 5). Typicals are at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) SYMBOL PARAMETER TEST CONDITIONS MIN (Note 6) TYP MAX (Note 6) UNITS |
类似零件编号 - ISL24202 |
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类似说明 - ISL24202 |
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