No. 5213-5/16

LC74725, 74725M

Note: CPDT goes to the high-impedance state when CS2 is high.

Figure 2 EDS Serial Output Test Conditions (N-Channel Open-Drain Circuit)

LN21 outputs the even field when MOD0 is low, and both fields when MOD0 is high.

Figure 3 O/E and LN21 Output Timing