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ISLA216P25 数据表(PDF) 1 Page - Intersil Corporation

部件名 ISLA216P25
功能描述  16-Bit, 250MSPS/200MSPS/130MSPS ADC
Download  32 Pages
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

ISLA216P25 数据表(HTML) 1 Page - Intersil Corporation

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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|Copyright Intersil Americas Inc. 2011. All Rights Reserved
Intersil (and design) and FemtoCharge are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
16-Bit, 250MSPS/200MSPS/130MSPS ADC
ISLA216P
The ISLA216P is a family of low power, high performance
16-bit analog-to-digital converters. Designed with Intersil’s
proprietary FemtoCharge™ technology on a standard CMOS
process, the family supports sampling rates of up to
250MSPS. The ISLA216P is part of a pin-compatible portfolio
of 12 to 16-bit A/Ds with maximum sample rates ranging from
130MSPS to 500MSPS.
A serial peripheral interface (SPI) port allows for extensive
configurability, as well as fine control of various parameters
such as gain and offset.
Digital output data is presented in selectable LVDS or CMOS
formats. The ISLA216P is available in a 72-contact QFN
package with an exposed paddle. Operating from a 1.8V
supply, performance is specified over the full industrial
temperature range (-40°C to +85°C).
Key Specifications
• SNR @ 250/200/130MSPS
• 75.0/76.6/77.5dBFS fIN = 30MHz
• 72.1/72.6/72.4dBFS fIN = 363MHz
• SFDR @ 250/200/130MSPS
•87/91/96dBc fIN = 30MHz
• 81/80/82dBc fIN = 363MHz
• Total Power Consumption = 786mW @ 250MSPS
Features
• Single Supply 1.8V Operation
• Clock Duty Cycle Stabilizer
• 75fs Clock Jitter
• 700MHz Bandwidth
• Programmable Built-in Test Patterns
•Multi-ADC Support
• SPI Programmable Fine Gain and Offset Control
• Support for Multiple ADC Synchronization
• Optimized Output Timing
• Nap and Sleep Modes
• 200µs Sleep Wake-up Time
• Data Output Clock
• DDR LVDS-Compatible or LVCMOS Outputs
• User-accessible Digital Temperature Monitor
Applications
• Radar Array Processing
• Software Defined Radios
• Broadband Communications
• High-Performance Data Acquisition
• Communications Test Equipment
DIGITAL
ERROR
CORRECTION
VINP
VINN
CLOCK
MANAGEMENT
SHA
16-BIT
250 MSPS
ADC
CLKP
CLKN
SPI
CONTROL
CLKOUTP
CLKOUTN
D[14:0]P
D[14:0]N
+
VCM
Pin-Compatible Family
MODEL
RESOLUTION
SPEED
(MSPS)
ISLA216P25
16
250
ISLA216P20
16
200
ISLA216P13
16
130
ISLA214P50
14
500
ISLA214P25
14
250
ISLA214P20
14
200
ISLA214P13
14
130
ISLA212P50
12
500
ISLA212P25
12
250
ISLA212P20
12
200
ISLA212P13
12
130
January 13, 2011
FN7574.0


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