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LC72136 数据表(PDF) 10 Page - Sanyo Semicon Device |
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LC72136 数据表(HTML) 10 Page - Sanyo Semicon Device |
10 / 23 page DI Control Data Functions No. 5038-10/23 LC72136, 72136M No. Control block/data Description Related data Programmable divider data • Data that sets the programmable divider P0 to P15 A binary value in which P15 is the MSB. The LSB changes depending on DVS and SNS. Note: P0 to P3 are ignored when P4 is the LSB. DVS, SNS • Selects the signal input pin (AMIN or FMIN) for the programmable divider, switches the frequency range, and determines the BOF pin output state. (*: Don’t care.) Note: See the “Programmable Divider” item for details. Reference divider data • Reference frequency (fref) selection data R0 to R3 Note: PLL INHIBIT The programmable divider and IF counter blocks are stopped, the FMIN, AMIN, and IFIN pins go to the pulled-down state, and the charge pump output pin goes to the high-impedance state. XS • Oscillator margin selection data XS = 0: “Reduction mode” The oscillator margin is reduced and the crystal radiation is reduced. XS = 1: Normal mode. Normal mode is selected following a power-on reset. IF counter control data • IF counter measurement start specification CTE CTE = 1: Counter start CTE = 0: Counter reset GT0, GT1 • IF counter measurement time determination Note: See the “IF Counter Structure” item for details. I/O port specification data • Data that specifies input or output for the I/O dual-use pins IOC1, IOC2 Data: 0 = input mode, 1 = output mode Output port data • BO1 to BO5, IO1, and IO2 output state data BO1 to BO5, IO1, IO2 Data: 0 = open, 1 = low • “Data = 0: Open” is selected following a power-on reset. (1) (2) (3) (4) (5) IFS IOC1 IOC2 DVS SNS LSB Divisor setting (N) Actual divisor 1 * P0 272 to 65535 Twice the value of the setting 0 1 P0 272 to 65535 The value of the setting 0 0 P4 4 to 4095 The value of the setting DVS SNS Input pin Input frequency range BOF pin 1 * FMIN 10 to 160 MHz Low 0 1 AMIN 2 to 40 MHz Open 0 0 AMIN 0.5 to 10 MHz Open GT1 GT0 Measurement time (ms) Wait time (ms) 0 0 4 3 to 4 0 1 8 3 to 4 1 0 32 7 to 8 1 1 64 7 to 8 R3 R2 R1 R0 Reference frequency (kHz) 0 0 0 0 25 0 0 0 1 25 0 0 1 0 25 0 0 1 1 25 0 1 0 0 12.5 0 1 0 1 6.25 0 1 1 0 3.125 0 1 1 1 3.125 1 0 0 0 5 1 0 0 1 5 1 0 1 0 5 1 0 1 1 1 1 1 0 0 3 1 1 0 1 15 1 1 1 0 PLL INHIBIT + Xtal OSC STOP 1 1 1 1 PLL INHIBIT Continued on next page. |
类似零件编号 - LC72136 |
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类似说明 - LC72136 |
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