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74ACT715SC 数据表(PDF) 1 Page - Fairchild Semiconductor

部件名 74ACT715SC
功能描述  Programmable Video Sync Generator
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制造商  FAIRCHILD [Fairchild Semiconductor]
网页  http://www.fairchildsemi.com
标志 FAIRCHILD - Fairchild Semiconductor

74ACT715SC 数据表(HTML) 1 Page - Fairchild Semiconductor

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April 2007
©1988 Fairchild Semiconductor Corporation
www.fairchildsemi.com
74ACT715, 74ACT715-R Rev. 1.3
74ACT715, 74ACT715-R
Programmable Video Sync Generator
Features
Maximum Input Clock Frequency
> 130MHz
Interlaced and non-interlaced formats available
Separate or composite horizontal and vertical Sync
and Blank signals available
Complete control of pulse width via register
programming
All inputs are TTL compatible
8mA drive on all outputs
Default RS170/NTSC values mask programmed into
registers
ACT715-R is mask programmed to default to a Clock
Enable state for easier start-up into 14.31818MHz
RS170 timing
General Description
The ACT715 and ACT715-R are 20-pin TTL-input
compatible devices capable of generating Horizontal,
Vertical and Composite Sync and Blank signals for tele-
visions and monitors. All pulse widths are completely
definable by the user. The devices are capable of gener-
ating signals for both interlaced and noninterlaced
modes of operation. Equalization and serration pulses
can be introduced into the Composite Sync signal when
needed.
Four additional signals can also be made available when
Composite Sync or Blank are used. These signals can
be used to generate horizontal or vertical gating pulses,
cursor position or vertical Interrupt signal.
These devices make no assumptions concerning the
system architecture. Line rate and field/frame rate are all
a function of the values programmed into the data regis-
ters, the status register, and the input clock frequency.
The ACT715 is mask programmed to default to a Clock
Disable state. Bit 10 of the Status Register, Register 0,
defaults to a logic “0”. This facilitates (re)programming
before operation.
The ACT715-R is the same as the ACT715 in all
respects except that the ACT715-R is mask pro-
grammed to default to a Clock Enabled state. Bit 10 of
the Status Register defaults to a logic “1”. Although
completely (re)programmable, the ACT715-R version is
better
suited
for
applications
using
the
default
14.31818MHz RS-170 register values. This feature
allows power-up directly into operation, following a single
CLEAR pulse.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Order Number
Package
Number
Package Description
74ACT715SC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ACT715-RSC
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
FACT™ is a trademark of Fairchild Semiconductor Corporation.


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