74AHCT74BQ datasheet(1/18 Pages) NXP

部件名	74AHCT74BQ

功能描述	Dual D-type flip-flop with set and reset; positive-edge trigger

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制造商	NXP [NXP Semiconductors]

网页	http://www.nxp.com

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1.

General description

The 74AHC74; 74AHCT74 is a high-speed Si-gate CMOS device and is pin compatible

with Low-Power Schottky TTL (LSTTL). It is speciﬁed in compliance with JEDEC standard

No. 7-A.

The 74AHC74; 74AHCT74 is a dual positive-edge triggered, D-type ﬂip-ﬂop with individual

data inputs (D), clock inputs (CP), set inputs (SD) and reset inputs (RD). It also has

complementary outputs (Q and Q).

The set and reset are asynchronous active LOW inputs that operate independent of the

clock input. Information on the data input is transferred to the Q output on the LOW to

HIGH transition of the clock pulse. The data inputs must be stable one set-up time prior to

the LOW to HIGH clock transition for predictable operation.

Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock

rise and fall times.

2.

Features

I Balanced propagation delays

I All inputs have Schmitt-trigger actions

I Inputs accept voltages higher than VCC

I Input levels:

N For 74AHC74: CMOS level

N For 74AHCT74: TTL level

I ESD protection:

N HBM EIA/JESD22-A114E exceeds 2000 V

N MM EIA/JESD22-A115-A exceeds 200 V

N CDM EIA/JESD22-C101C exceeds 1000 V

I Multiple package options

I Speciﬁed from −40 °C to +85 °C and from −40 °C to +125 °C

74AHC74; 74AHCT74

Dual D-type ﬂip-ﬂop with set and reset; positive-edge trigger

Rev. 05 — 9 June 2008

Product data sheet

类似零件编号 - 74AHCT74BQ

制造商	部件名	数据表	功能描述
Nexperia B.V. All right...	74AHCT74BQ	256Kb / 15P	Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 8 - 22 April 2020
Nexperia B.V. All right...	74AHCT74BQ-Q100	752Kb / 19P	Dual D-type flip-flop with set and reset positive-edge trigger

制造商	部件名	数据表	功能描述
NXP Semiconductors	74LVC74A	99Kb / 10P	Dual D-type flip-flop with set and reset; positive-edge trigger 1998 Jun 17
Integral Corp.	IN74LV74	161Kb / 7P	Dual D-type flip-flop with set and reset; positive-edge trigger
Nexperia B.V. All right...	74HC74-Q100	798Kb / 19P	Dual D-type flip-flop with set and reset; positive edge-trigger
	74LVC74A-Q100	722Kb / 18P	Dual D-type flip-flop with set and reset; positive-edge trigger
	74LV74	251Kb / 15P	Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 5 - 24 March 2021
	74LV74-Q100	1Mb / 17P	Dual D-type flip-flop with set and reset; positive-edge trigger
	74AHC74-Q100	752Kb / 19P	Dual D-type flip-flop with set and reset positive-edge trigger
	74ABT74	227Kb / 13P	Dual D-type flip-flop with set and reset; positive edge-trigger Rev. 3 - 12 October 2020
	74LVC74A	266Kb / 16P	Dual D-type flip-flop with set and reset; positive-edge trigger Rev. 9 - 20 August 2021
NXP Semiconductors	74LV74	125Kb / 12P	Dual D-type flip-flop with set and reset; positive-edge trigger 1998 Apr 20
NXP Semiconductors	74HC74D-T	125Kb / 22P	Dual D-type flip-flop with set and reset; positive-edge trigger 2003 Jul 10