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ISL54302IRZ 数据表(PDF) 3 Page - Intersil Corporation

部件名 ISL54302IRZ
功能描述  12V, 1.5OHM Quad SPST Switch with Latched Parallel Interface
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制造商  INTERSIL [Intersil Corporation]
网页  http://www.intersil.com/cda/home
标志 INTERSIL - Intersil Corporation

ISL54302IRZ 数据表(HTML) 3 Page - Intersil Corporation

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3
March 19, 2008
Absolute Maximum Ratings
Thermal Information
VPLUS to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to15V
VDD to VSS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5V
VLOGIC to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 5V
VSS to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -4V to 0.3V
VPLUS to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 15V
All Other Pins (Note 1) . . . . . . . . ((VSS) - 0.3V) to ((VPLUS) + 0.3V)
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 35mA
Peak Current, 1A-4A,1B-4B
(Pulsed 1ms, 10% Duty Cycle, Max) . . . . . . . . . . . . . . . . . 100mA
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>3kV
CDM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >1.5kV
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
Thermal Resistance (Typical)
θJA (°C/W) θJC (°C/W)
20 Ld QFN Package (Notes 2, 3) . . . . . .
32
1.4
Maximum Junction Temperature (Plastic Package). . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . . . . -65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Analog Switch Signal Range . . . . . . . . VSS + 0.5V to VPLUS - 0.5V
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Signals on 1A-4A,1B-4B, exceeding VPLUS or VSS are clamped by internal diodes. DATA_IN, CLOCK_IN, CS_LATCH exceeding VLOGIC or
VSS are clamped by internal diodes. Limit forward diode current to maximum current ratings.
2.
θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For
θ
JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Test Conditions: VPLUS = +9V, VSS = -3V Supply, VLOGIC = 3V, VDD = GND = 0V, VINH = 2.2V, VINL = 0.8V,
Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 9)
TYP
(Note 10)
MAX
(Note 9)
UNITS
ANALOG SWITCH CHARACTERISTICS
ON-resistance, rON
ICOM = 10mA, VXA, VXB within analog signal
(see Figure 4)
25
2.0
Ω
Full
2.5
Ω
rON Matching Between Channels,
ΔrON
ICOM = 10mA, VXA, VXB within analog signal range
(Note 5)
25
0.2
Ω
Full
0.3
Ω
rON Flatness, rFLAT(ON)
ICOM = 10mA, VXA, VXB within analog signal range
(Note 4)
25
0.4
Ω
Full
0.6
Ω
OFF Leakage Current, INO(OFF)
VXA, VXB within analog signal range
25
15
nA
Full
-200
+200
nA
DIGITAL INPUT CHARACTERISTICS (Note 8)
Input Voltage High, Digital Interface SW-CTRL(1-4), CS_LATCH
Full
2.2
1.75
V
Input Voltage Low, Digital Interface
SW-CTRL(1-4), CS_LATCH
Full
1.75
0.8
V
SW-CTRL (1-4) Into CS_Latch
Setup Time
tSETUP (Note 6, Figure 5)
Full
1
ns
SW-CTRL (1-4) Into CS_Latch Hold
Time
tHOLD (Note 6, Figure 5)
Full
3.5
ns
Input Current, IINH, IINL
VIN = 0V or VLOGIC
Full
-1
0.01
1
µA
CS_LATCH Rise, Fall Time
10% to 90% and 90% to 10%
Full
3
ns
CS_LATCH Minimum Pulse Width
Rising to Falling Edge 50% Points
Full
10
ns
SWITCH DYNAMIC CHARACTERISTICS
Turn-ON Time, tON
VXA, VXB = 3V, RL = 300Ω, CL = 35pF, VIN = 0V to 3V,
(see Figure 1)
25
50
ns
Full
55
ns
ISL54302


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