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ISL31485EIBZ 数据表(PDF) 11 Page - Intersil Corporation |
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ISL31485EIBZ 数据表(HTML) 11 Page - Intersil Corporation |
11 / 24 page ISL31480E, ISL31483E, ISL31485E, ISL31486E 11 FN7638.0 June 25, 2010 Receiver Skew | tPLH - tPHL | tSKD (Figure 5) Full - 4 10 ns Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Notes 12, 19) Full - - 50 ns Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Notes 12, 19) Full - - 50 ns Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6) (Note 19) Full - - 50 ns Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6) (Note 19) Full - - 50 ns Time to Shutdown tSHDN (Notes 13, 19) Full 60 160 600 ns Receiver Enable from Shutdown to Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), (Notes 13, 15, 19) Full - - 2000 ns Receiver Enable from Shutdown to Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), (Notes 13, 15, 19) Full - - 2000 ns NOTES: 8. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified. 9. Supply current specification is valid for loaded drivers when DE = 0V. 10. Applies to peak current. See “Typical Performance Curves” beginning on page 18 for more information 11. Keep RE = 0 to prevent the device from entering SHDN. 12. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN. 13. Transceivers (except on the ISL31485E) are put into shutdown by bringing RE high and DE low. If the inputs are in this state for less than 60ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power Shutdown Mode” on page 17. 14. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN. 15. Set the RE signal high time >600ns to ensure that the device enters SHDN. 16. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 17. See Figure 9 for more information, and for performance over-temperature. 18. Tested according to TIA/EIA-485-A, Section 4.2.6 (±80V for 15ms at a 1% duty cycle). 19. Does not apply to the ISL31485E. The ISL31485E has no Rx enable function, and thus no SHDN function. 20. See “Caution” statement in the “Recommended Operating Conditions” section on page 9. Test Circuits and Waveforms FIGURE 1A. VOD AND VOC FIGURE 1B. 1B FIGURE 1. DC DRIVER TEST CIRCUITS Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V, VL = VCC; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C (Note 8). Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued) PARAMETER SYMBOL TEST CONDITIONS TEMP (°C) MIN (Note 16) TYP MAX (Note 16) UNITS D DE DI VL OR VCC VOD VOC RL/2 RL/2 Z Y D DE DI VL OR VOD 375Ω 375Ω Z Y VCM VCC RL/2 RL/2 VOC |
类似零件编号 - ISL31485EIBZ |
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类似说明 - ISL31485EIBZ |
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