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KM48C2100B 数据表(PDF) 6 Page - Samsung semiconductor

部件名 KM48C2100B
功能描述  2M x 8Bit CMOS Dynamic RAM with Fast Page Mode
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制造商  SAMSUNG [Samsung semiconductor]
网页  http://www.samsung.com/Products/Semiconductor
标志 SAMSUNG - Samsung semiconductor

KM48C2100B 数据表(HTML) 6 Page - Samsung semiconductor

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KM48C2000B, KM48C2100B
CMOS DRAM
KM48V2000B, KM48V2100B
AC CHARACTERISTICS (Continued)
Parameter
Symbol
-5
-6
-7
Units
Notes
Min
Max
Min
Max
Min
Max
Data set-up time
tDS
0
0
0
ns
8
Data hold time
tDH
10
10
15
ns
8
Refresh period (2K, Normal)
tREF
32
32
32
ms
Refresh period (4K, Normal)
tREF
64
64
64
ms
Refresh period (L-ver)
tREF
128
128
128
ms
Write command set-up time
tWCS
0
0
0
ns
6
CAS to W delay time
tCWD
36
40
50
ns
6
RAS to W delay time
tRWD
73
85
100
ns
6
Column address to W delay time
tAWD
48
55
65
ns
6
CAS precharge to W delay time
tCPWD
53
60
70
ns
6
CAS set-up time (CAS -before-RAS refresh)
tCSR
5
5
5
ns
CAS hlod time (CAS -before-RAS refresh)
tCHR
10
10
15
ns
RAS to CAS precharge time
tRPC
5
5
5
ns
CAS precharge time (CBR counter test
tCPT
20
20
30
ns
Access time from CAS precharge
tCPA
30
35
40
ns
3
Fast Page mode cycle time
tPC
35
40
45
ns
Fast Page read-modify-write cycle time
tPRWC
76
85
100
ns
CAS precharge time (Fast Page cycle)
tCP
10
10
10
ns
RAS pulse width (Fast Page cycle)
tRASP
50
200K
60
200K
70
200K
ns
RAS hold time from CAS precharge
tRHCP
30
35
40
ns
OE access time
tOEA
13
15
20
ns
OE to data delay
tOED
13
15
20
ns
Output buffer turn off delay time from OE
tOEZ
0
13
0
15
0
20
ns
5
OE command hold time
tOEH
13
15
20
ns
Write command set-up time (Test mode in)
tWTS
10
10
10
ns
10
Write command hold time (Test mode in)
tWTH
10
10
10
ns
10
W to RAS precharge time(C-B-R refresh)
tWRP
10
10
10
ns
W to RAS hold time(C-B-R refresh)
tWRH
10
10
10
ns
RAS pulse width (C-B-R self refresh)
tRASS
100
100
100
us
12
RAS precharge time (C-B-R self refresh)
tRPS
90
110
130
ns
12
CAS hold time (C-B-R self refresh)
tCHS
-50
-50
-50
ns
12


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