数据搜索系统,热门电子元器件搜索 |
|
AD5433 数据表(PDF) 4 Page - Analog Devices |
|
AD5433 数据表(HTML) 4 Page - Analog Devices |
4 / 32 page AD5424/AD5433/AD5445 Rev. B | Page 4 of 32 Parameter Min Typ Max Unit Conditions Output Capacitance IOUT1 12 17 pF All 0s loaded 25 30 pF All 1s loaded IOUT2 22 25 pF All 0s loaded 10 12 pF All 1s loaded Digital Feedthrough 1 nV-s Feedthrough to DAC output with CS high and alternate loading of all 0s and all 1s Analog THD 81 dB VREF = 3.5 V p-p, all 1s loaded, f = 100 kHz Digital THD Clock = 10 MHz, VREF = 3.5 V 50 kHz fOUT 65 dB Output Noise Spectral Density 25 nV√Hz @ 1 kHz SFDR Performance (Wide Band) AD5445, VREF = 3.5 V Clock = 10 MHz 500 kHz fOUT 55 dB 100 kHz fOUT 63 dB 50 kHz fOUT 65 dB Clock = 25 MHz 500 kHz fOUT 50 dB 100 kHz fOUT 60 dB 50 kHz fOUT 62 dB SFDR Performance (Narrow Band) AD5445, VREF = 3.5 V Clock = 10 MHz 500 kHz fOUT 73 dB 100 kHz fOUT 80 dB 50 kHz fOUT 82 dB Clock = 25 MHz 500 kHz fOUT 70 dB 100 kHz fOUT 75 dB 50 kHz fOUT 80 dB Intermodulation Distortion AD5445, VREF = 3.5 V Clock = 10 MHz f1 = 400 kHz, f2 = 500 kHz 65 dB f1 = 40 kHz, f2 = 50 kHz 72 dB Clock = 25 MHz f1 = 400 kHz, f2 = 500 kHz 51 dB f1 = 40 kHz, f2 = 50 kHz 65 dB POWER REQUIREMENTS Power Supply Range 2.5 5.5 V IDD 0.6 μA TA = 25°C, logic inputs = 0 V or VDD 0.4 5 μA Logic inputs = 0 V or VDD, T= −40°C to +125°C Power Supply Sensitivity 0.001 %/% ΔVDD = ±5% 1 Guaranteed by design, not subject to production test. |
类似零件编号 - AD5433 |
|
类似说明 - AD5433 |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |