1

FEATURES

NC

Nointernalconnections

Seemechanicaldrawingsfordimensions.

-

DBVPACKAGE

(TOP VIEW)

2

5

3

4

Y

1

B

GND

A

V

CC

DCKPACKAGE

(TOP VIEW)

3

4

GND

2

B

Y

1

A

5

V

CC

DRL PACKAGE

(TOP VIEW)

2

B

1

A

3

4

GND

Y

5

V

CC

YZP PACKAGE

(BOTTOMVIEW)

2

1

GND

4

3

Y

5

V

CC

DRY PACKAGE

(TOP VIEW)

A

6

4

B

2

3

GND

Y

V

CC

1

5

NC

PR

EVIE

W

A1

B1

C1

A2

C2

B

A

DESCRIPTION/ORDERING INFORMATION

SN74AUC1G32

SINGLE 2-INPUT POSITIVE-OR GATE

2

• Available in the Texas Instruments NanoFree™

• Max t

Package

• Low Power Consumption, 10-µA Max I

CC

• Optimized for 1.8-V Operation and Is 3.6-V I/O

• ±8-mA Output Drive at 1.8 V

Tolerant to Support Mixed-Mode Signal

• Latch-Up Performance Exceeds 100 mA Per

Operation

JESD 78, Class II

• I

• ESD Protection Exceeds JESD 22

Operation

–

2000-V Human-Body Model (A114-A)

• Sub-1-V Operable

–

1000-V Charged-Device Model (C101)

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the

package.

preventing damaging current backflow through the device when it is powered down.

For more information about AUC Little Logic devices, please refer to the TI application report, Applications of

Texas Instruments AUC Sub-1-V Little Logic Devices, literature number SCEA027.

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2

NanoFree is a trademark of Texas Instruments.

UNLESS

OTHERWISE

NOTED

this

document

contains

Copyright © 2001–2009, Texas Instruments Incorporated

PRODUCTION DATA information current as of publication date.

Products conform to specifications per the terms of Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.