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TPA2015D1YZHR 数据表(PDF) 4 Page - Texas Instruments |
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TPA2015D1YZHR 数据表(HTML) 4 Page - Texas Instruments |
4 / 25 page TPA2015D1 SLOS638 – MAY 2010 www.ti.com THERMAL INFORMATION TPA2015D1 THERMAL METRIC(1) YZH UNITS 16 PINS qJA Junction-to-ambient thermal resistance(2) 75 qJC(top) Junction-to-case(top) thermal resistance (3) 22 qJB Junction-to-board thermal resistance (4) 26 °C/W yJT Junction-to-top characterization parameter (5) 0.5 yJB Junction-to-board characterization parameter (6) 25 qJC(bottom) Junction-to-case(bottom) thermal resistance (7) n/a (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. (3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. (4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. (5) The junction-to-top characterization parameter, yJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining qJA, using a procedure described in JESD51-2a (sections 6 and 7). (6) The junction-to-board characterization parameter, yJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining qJA , using a procedure described in JESD51-2a (sections 6 and 7). (7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. RECOMMENDED OPERATING CONDITIONS MIN MAX UNIT Supply voltage, VBAT 2.5 5.2 V VIH High–level input voltage, END, ENB 1.3 V VIL Low–level input voltage, END, ENB 0.6 V TA Operating free-air temperature –40 85 °C TJ Operating junction temperature –40 150 °C ELECTRICAL CHARACTERISTICS VBAT= 3.6 V, Gain = 6 dB, RAGC = Float, TA = 25°C, RL = 8 Ω + 33 mH (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT END = 0 V, ENB = VBAT 2.5 5.2 V VBAT supply voltage range END = VBAT, ENB = VBAT, AGC options 1, 2, and 3 2.5 5.2 END = VBAT, ENB = VBAT, AGC option 0 2.8 5.2 Class-D supply voltage END = ENB = VBAT, boost converter active 5.2 5.8 V range END = VBAT, ENB = 0 V 3.1 5.25 V VBAT = 2.5 V to 5.2 V, END = ENB = VBAT 85 Power supply ripple dB VBAT = 2.5 V to 5.2 V, END = VBAT, ENB = 0 V rejection 75 (pass through mode) END = 0 V, ENB = VBAT 0.5 mA Operating quiescent current END = ENB = VBAT 1.7 2.2 mA Shutdown quiescent VBAT = 2.5 V to 5.2 V, END = ENB = GND 0.2 3 mA current Gain = 6 dB (connect to GND) 0 0.25 × VBAT Gain control pin voltage Gain = 15.5 dB (float) 0.4 × VBAT 0.6 × VBAT V Gain = 20 dB (connect to VBAT) 0.75 × VBAT 4 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s): TPA2015D1 |
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