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STA015T 数据表(PDF) 9 Page - STMicroelectronics |
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STA015T 数据表(HTML) 9 Page - STMicroelectronics |
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9 / 56 page  Obsolete Product(s) - Obsolete Product(s) 9/56 STA015 supported interface. This could be useful, for instance, to process audio data coming from an external tuner or some other auxiliary source. MP3 mode In MP3 Mode (default mode) STA015 decodes the incoming bitstream, acting as a master of the data communication from the source to itself. This control is done by a specific buffer management, controlled by STA015 embedded oftware. The data coming from the serial interface are stored in the input buffer, a 256 bytes long FIFO. The feedback line DATA_REQ actually is the result of the h/w comparison between the writing address of the FIFO and the constant value 252. This means that if the buffer is filled up with more than 252 bytes the DATA_REQ line goes low, requesting MCU to stop transmission: the maximum time to stop transmitting is given by the time required to transmit 4 bytes (this time, in turn, depends on the bitstream speed used to send MP3 data). The input interface can receive data with a speed up to 20Mbit/s. The speed at which the FIFO is emptied is equal to the MP3 nominal bitrate. Provided the FIFO is filled up with 252 bytes the time required to empty it (in worst condition, which is 320kbit/s mpeg stream) is about 6ms. So if no more data is received in this time the buffer will be emptied and this will badly affect the output audio. In this mode the fractional part of the PLL is disabled and the audio clocks are generated at nominal rates. Fig. 6 describes the default DATA_REQ signal behaviour. Programming STA015 it is possible to invert the polarity of the DATA_REQ line (register REQ_POL). In order to allow proper operation of the device in broadcast applications a special BRAODCAST MP3 de- coding mode is available. When configured in BROADCAST mode the device will operate as a slave de- coder and no more feedback will be generated to the data source. The output PCM clock will be automatically adjusted by the embedded DSP in order to follow the incoming bitstream rate and to avoid input buffer underrun/overrun. A special configuration file must be used to en- able this operational mode: the file must be downloaded via I2C link after device power-on. Please contact your local ST branch to have more information about. Figure 6. DATA_REQ control line 2.4 STA015 Decoding States There are three different decoder states: Idle, Init, and Decode. Commands to change the decoding states are described in the STA015 I2C registers description. Idle Mode IIn this mode (entered after a S/W or H/W reset) the decoder is waiting for the RUN command. This mode should be used to initialize the configuration registers of the device. The DAC connected to STA015 can be initialized during this mode (set MUTE to 1). MUTE to 1). PLAY MUTE Clock State PCM Output X 0 Not Running 0 X 1 Running 0 SOURCE SEND DATA TO STA015 DATA_REQ SOURCE STOPS TRANSMITTING DATA SOURCE STOPS TRANSMITTING DATA D00AU1144 |
类似零件编号 - STA015T |
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类似说明 - STA015T |
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