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Si5368 数据表(PDF) 7 Page - Silicon Laboratories |
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Si5368 数据表(HTML) 7 Page - Silicon Laboratories |
7 / 50 page Si5317 Preliminary Rev. 0.15 7 Weak Internal Input Pull-down Resistor RPDN —75 — k 3-Level Input Pins Input Voltage Low VILL —— 0.15 x VDD V Input Voltage Mid VIMM 0.45 x VDD — 0.55 x VDD V Input Voltage High VIHH 0.85 x VDD —— V Input Low Current IILL 2 –20 — — µA Input Mid Current IIMM 2 –2 — 2 µA Input High Current IIHH 2 —— 20 µA LVCMOS Output Pins Output Voltage Low VOL IO =2mA VDD =1.62V —— 0.4 V IO =2mA VDD =2.97V —— 0.4 V Output Voltage High VOH IO =–2mA VDD =1.62V VDD –0.4 — — V IO =–2mA VDD =2.97V VDD –0.4 — — V Single-Ended Reference Clock Input Pin XA (XB with cap to gnd) Input Resistance XARIN XTAL/RefCLK RATE[1:0] = LM, ML, MH, or HM 8.5 10 11.5 k Input Voltage Level Limits XAVIN 0— 1.2 V Input Voltage Swing XAVPP 0.5 — 1.2 VPP Differential Reference Clock Input Pins (XA/XB) Input Resistance XA/XBRIN XTAL/RefCLK RATE[1:0] = LM, ML, MH, or HM 8.5 10 11.5 k Differential Input Voltage Level Limits XA/XBVIN 0— 1.2 V Input Voltage Swing XAVPP/XBVPP 0.5 — 1.2 VPP, each Table 2. DC Characteristics (Continued) (VDD = 1.8 ±5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 ºC) Parameter Symbol Test Condition Min Typ Max Units Notes: 1. LVPECL outputs require VDD > 2.25 V. 2. This is the amount of leakage that the 3L inputs can tolerate from an external driver. See Figure 3 on page 9. In most designs, an external resistor voltage divider is recommended. 3. No overshoot or undershoot. |
类似零件编号 - Si5368 |
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类似说明 - Si5368 |
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