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CS4224-KS 数据表(PDF) 11 Page - Cirrus Logic |
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CS4224-KS 数据表(HTML) 11 Page - Cirrus Logic |
11 / 34 page CS4223 CS4224 DS290F1 11 SWITCHING CHARACTERISTICS - CONTROL PORT - I2C MODE (CS4224) (Inputs: Logic 0 = DGND, Logic 1 = VD; CL =30pF) Notes: 15. Not tested but guaranteed by design. 16. Data must be held for sufficient time to bridge the 300 ns transition time of SCL. Parameter Symbol Min Max Unit I2C® Mode (SPI/I2C = 1) SCL Clock Frequency fscl - 100 kHz RST rising edge to Start (Note 15) tirs 50 - µs Bus Free Time between transmissions tbuf 4.7 - µs Start Condition Hold Time (prior to first clock pulse) thdst 4.0 - µs Clock Low Time tlow 4.7 - µs Clock High Time thigh 4.0 - µs Setup time for repeated Start Condition tsust 4.7 - µs SDA holdtimefor SCLfalling (Note 16) thdd 0- µs SDA setup time to SCL rising tsud 250 - ns Rise time of SCL trc -25 ns Fall time of SCL tfc -25 ns Rise time of SDA trd -1 µs Fall time of SDA tfd - 300 ns Setup time for Stop Condition tsusp 4.7 - µs t buf t hdst t hdst t low t rc t fc t hdd t high t sud t sust t susp Stop Start Start Stop Repeated SDA SCL t irs RST t rd t fd Figure 3. I2C Control Port Timing |
类似零件编号 - CS4224-KS |
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类似说明 - CS4224-KS |
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