数据搜索系统,热门电子元器件搜索 |
|
TPD12S015YFFRB 数据表(PDF) 2 Page - Texas Instruments |
|
TPD12S015YFFRB 数据表(HTML) 2 Page - Texas Instruments |
2 / 27 page uC HDMI PHY hdmi_clkm O hdmi_clkp O hdmi_data0m O hdmi_data0p O hdmi_data1m O hdmi_data1p O hdmi_data2m O hdmi_data2p O HDMI Sideband hdmi_cec IO hdmi_hpd I hdmi_scl IO hdmi_sda IO vdda_hdmi_vdac P vssa_hdmi_vdac GND PMIC Regulator Vdac_out O vdds_1p8 P V1V8 O Battery vbat VBAT O GPIO_HDMI-LS_OE O GPIO_HDMI- CT_CP_HPD O HDMI-TPD12S015-Configuration A TPD12S015 HDMI Connector HDMI Source side CEC_A IO SCL_A IO SDA_A IO HPD_A O HDMI Sink side CEC_B IO SCL_B IO SDA_B IO HPD_B I CLK- DATA0- DATA 0+ CEC VCCA CLK+ DATA1- DATA 1+ DATA2- DATA 2+ DDC-SC DDC-SDA HPD Connecto CLk+ I DATA 0- I DATA 0+ I DATA 1- I DATA 1+ I DATA 2- I DATA 2+ I SCL IO +5V P CLK- I SDA IO CEC IO HPD O LS_OE VBAT C L K + I C L K - I D 0 + I D 0 - I D 1 + I D 1 - I D 2 + I D 2 - I CT_CP_HPD +5V TMDS signal Power Supplies SW I 5VOUT(+5v) O Control Lines VCCA I LS_OE I CT_CP_HPD I GND A 3.3V LDO 5V DC-DC CHDMI-VBAT 2.2µF CHDMI-VCCA 0.1µF LHDMI-VBAT 1 µH CHDMI-5v 4.7 µH FB I VBAT I TPD12S015 SLLSE19A – DECEMBER 2009 – REVISED JANUARY 2010 www.ti.com There are three non-inverting bi-directional translation circuits for the SDA, SCL, and CEC lines. Each have a common power rail (VCCA) on the A side from 1.1 V to 3.6V . On the B side, the SCL_B and SDA_B each have an internal 1.75 k Ω pullup connected to the regulated 5 V rail (5VOUT). The SCL and SDA pins meet the I2C specification and drive up to 750 pF loads. The CEC_B pin has an internal 27 k Ω pullup to an internal 3.3 V supply. The HPD_B port has a glitch filter to avoid false detection due to the bouncing while inserting the HDMI plug. The TPD12S015 provides IEC61000-4-2 (Level 4) ESD protection. This device is offered in a space-saving 1.6 mm × 2.8 mm wafer-level chip scale package [WCSP (YFF)] with 0.4-mm pitch. ORDERING INFORMATION TA PACKAGE(1) (2) ORDERABLE PART NUMBER TOP-SIDE MARKING TPD12S015YFFR PN015 –40°C to 85°C WCSP – YFF Tape and reel TPD12S015YFFRB(3) PN015 (1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. (2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (3) The TPD12S015YFFRB is the YFF package with back-side coating. SYSTEM-LEVEL BLOCK DIAGRAM 2 Submit Documentation Feedback Copyright © 2009–2010, Texas Instruments Incorporated Product Folder Link(s): TPD12S015 |
类似零件编号 - TPD12S015YFFRB |
|
类似说明 - TPD12S015YFFRB |
|
|
链接网址 |
隐私政策 |
ALLDATASHEETCN.COM |
ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |