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74LVCH1T45GM 数据表(PDF) 2 Page - NXP Semiconductors |
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74LVCH1T45GM 数据表(HTML) 2 Page - NXP Semiconductors |
2 / 30 page 74LVC_LVCH1T45_2 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 19 January 2010 2 of 30 NXP Semiconductors 74LVC1T45; 74LVCH1T45 Dual supply translating transceiver; 3-state Latch-up performance exceeds 100 mA per JESD 78 Class II ±24 mA output drive (V CC = 3.0 V) Inputs accept voltages up to 5.5 V Low power consumption: 16 μA maximum I CC IOFF circuitry provides partial Power-down mode operation Multiple package options Specified from −40 °C to +85 °C and −40 °C to +125 °C 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1T45GW −40 °C to +125 °C SC-88 plastic surface-mounted package; 6 leads SOT363 74LVCH1T45GW 74LVC1T45GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm SOT886 74LVCH1T45GM 74LVC1T45GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1 × 0.5 mm SOT891 74LVCH1T45GF Table 2. Marking Type number Marking code[1] 74LVC1T45GW V5 74LVCH1T45GW X5 74LVC1T45GM V5 74LVCH1T45GM X5 74LVC1T45GF V5 74LVCH1T45GF X5 |
类似零件编号 - 74LVCH1T45GM |
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类似说明 - 74LVCH1T45GM |
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