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ADE5166 数据表(PDF) 9 Page - Analog Devices |
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ADE5166 数据表(HTML) 9 Page - Analog Devices |
9 / 156 page ![]() ADE5166/ADE5169/ADE5566/ADE5569 Rev. B | Page 9 of 156 Parameter Min Typ Max Unit Test Conditions/Comments POWER SUPPLY INPUTS VDD 3.13 3.3 3.46 V VBAT 2.4 3.3 3.7 V INTERNAL POWER SUPPLY SWITCH (VSWOUT) VBAT to VSWOUT On Resistance 12 Ω VBAT = 2.4 V VDD to VSWOUT On Resistance 9 Ω VDD = 3.13 V VBAT to/from VDD Switching Open Time 40 ns BCTRL State Change and Switch Delay 18 μs VSWOUT Output Current Drive 6 mA POWER SUPPLY OUTPUTS VINTA 2.3 2.70 V VINTD 2.3 2.70 V VINTA Power Supply Rejection 60 dB VINTD Power Supply Rejection 50 dB POWER SUPPLY CURRENTS Current in Normal Mode (PSM0) 4.4 5.3 mA fCORE = 4.096 MHz, LCD and meter active 2.2 mA fCORE = 1.024 MHz, LCD and meter active 1.6 mA fCORE = 32.768 kHz, LCD and meter active 3 3.9 mA fCORE = 4.096 MHz; metering ADC and DSP, powered down Current in Battery Mode (PSM1) 3.3 5.05 mA fCORE = 4.096 MHz, LCD active, VBAT = 3.7 V 1 mA fCORE = 1.024 MHz, LCD active Current in Sleep Mode (PSM2) 38 μA LCD active with charge pump at 3.3 V + RTC, VBAT = 3.3 V 1.7 μA RTC only, TA = 25°C, VBAT = 3.3 V 1 Specifications guaranteed by design. 2 Endurance is qualified as per JEDEC Standard 22 Method A117 and measured at −40°C, +25°C, +85°C, and +125°C. 3 Retention lifetime equivalent at junction temperature (TJ) = 85°C as per JEDEC Standard 22 Method A117. Retention lifetime derates with junction temperature. 4 Recommended crystal specifications. 5 Test carried out with all the I/Os set to a low output level. 6 Delay between power supply valid and execution of first instruction by 8052 core. |
类似零件编号 - ADE5166 |
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类似说明 - ADE5166 |
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