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TC58FVT641 数据表(PDF) 7 Page - Toshiba Semiconductor

部件名 TC58FVT641
功能描述  64-MBIT (8M 횞 8 BITS / 4M 횞 16 BITS) CMOS FLASH MEMORY
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制造商  TOSHIBA [Toshiba Semiconductor]
网页  http://www.semicon.toshiba.co.jp/eng
标志 TOSHIBA - Toshiba Semiconductor

TC58FVT641 数据表(HTML) 7 Page - Toshiba Semiconductor

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TC58FVT641/B641FT/XB-70,-10
2001-09-06
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ID Read Mode
ID Read Mode is used to read the device maker code and device code. The mode is useful in that it allows
EPROM programmers to identify the device type automatically.
ID read can be executed in two ways, as follows:
(1) Applying VID to A9
This method is used mainly by EPROM programmers. Applying VID to A9 sets the device to ID Read
Mode, outputting the maker code from address 00H and the device code from address 01H. Releasing VID
from A9 returns the device to Read Mode. With this method all banks are set to ID Read Mode; thus,
simultaneous operation cannot be performed.
(2) Input command sequence
With this method simultaneous operation can be performed. Inputting an ID Read command sets the
specified bank to ID Read Mode. Banks are specified by inputting the bank address (BK) in the third Bus
Write cycle of the Command cycle. To read an ID code, the bank address as well as the ID read address must
be specified. The maker code is output from address BK + 00; the device code is output from address BK +
01. From other banks data are output from the memory cells. Inputting a Reset command releases ID Read
Mode and returns the device to Read Mode.
Access time in ID Read Mode is the same as that in Read Mode. For a list of the codes, please refer to the
ID Code Table.
Standby Mode
There are two ways to put the device into Standby Mode.
(1) Control using CE and RESET
With the device in Read Mode, input VDD ± 0.3 V to CE and RESET . The device will enter Standby
Mode and the current will be reduced to the standby current (IDDS1). However, if the device is in the
process of performing simultaneous operation, the device will not enter Standby Mode but will instead
cause the operating current to flow.
(2) Control using RESET only
With the device in Read Mode, input VSS ± 0.3 V to RESET . The device will enter Standby Mode and the
current will be reduced to the standby current (IDDS1). Even if the device is in the process of performing
simultaneous operation, this method will terminate the current operation and set the device to Standby
Mode. This is a hardware reset and is described later.
In Standby Mode DQ is put in High-Impedance state.
Auto-Sleep Mode
This function suppresses power dissipation during reading. If the address input does not change for 150 ns,
the device will automatically enter Sleep Mode and the current will be reduced to the standby current (IDDS2).
However, if the device is in the process of performing simultaneous operation, the device will not enter Standby
Mode but will instead cause the operating current to flow. Because the output data is latched, data is output in
Sleep Mode. When the address is changed, Sleep Mode is automatically released, and data from the new
address is output.
Output Disable Mode
Inputting VIH to OE disables output from the device and sets DQ to High-Impedance.


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