Data Sheet E0067N10

8

MC-458CA721ESA, 458CA721PSA, 458CA721XSA

Synchronous Characteristics

Parameter

Symbol

-A 80

-A 10

Unit

Note

MIN.

MAX.

MIN.

MAX.

Clock cycle time

/CAS latency = 3

8

(125 MHz)

10

(100 MHz)

ns

/CAS latency = 2

10

(100 MHz)

13

(77 MHz)

ns

Access time from CLK

/CAS latency = 3

6

6

ns

1

/CAS latency = 2

6

7

ns

1

CLK high level width

3

3

ns

CLK low level width

3

3

ns

Data-out hold time

3

3

ns

1

Data-out low-impedance time

0

0

ns

Data-out high-impedance time

/CAS latency = 3

3

6

3

6

ns

/CAS latency = 2

3

6

3

7

ns

Data-in setup time

2

2

ns

Data-in hold time

1

1

ns

Address setup time

2

2

ns

Address hold time

1

1

ns

CKE setup time

2

2

ns

CKE hold time

1

1

ns

CKE setup time (Power down exit)

2

2

ns

Command (/CS0, /RAS, /CAS, /WE,

DQMB0 - DQMB7) setup time

2

2

ns

Command (/CS0, /RAS, /CAS, /WE,

DQMB0 - DQMB7) hold time

1

1

ns

Note 1. Output load

Output

Z = 50

Ω

50 pF

Remark These specifications are applied to the monolithic device.