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SM59364 数据表(PDF) 7 Page - SyncMOS Technologies,Inc |
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SM59364 数据表(HTML) 7 Page - SyncMOS Technologies,Inc |
7 / 19 page SyncMOS Technologies International, Inc. SM59364 8-Bits Micro-controller 64KB ISP flash & 1KB RAM embedded Specifications subject to change without notice contact your sales representatives for the most recent information. IDMMX-0033 Ver B SM59364 04/2008 7 1.2.2 Data Memory - Higher 128 byte ($80 to $FF) The address $80 to $FF can be accessed by indirect addressing mode . Address $80 to $FF is data area. 1.2.3 Data Memory - Expanded 768 bytes ($0000 to $02FF) From external address $0000 to $02FF is the on-chip expanded RAM area, total 768 bytes. This area can be accessed by external direct addressing mode (by instruction MOVX). If the address of instruction MOVX @DPTR is larger than $02FF then SM59364 will generate the external memory control signal automatically. The bit 1 (OME) of special function register $BF (SCONF) can enable or disable this expanded 768 byte RAM. The default setting of OME bit is 1 (enable). System Control Register (SCONF, $BF) bit-7 bit-0 WDR Unused Unused Unused DFEN ISPE OME ALEI Read / Write: R/W - - - - R/W R/W R/W Reset value: 0 * * * * 0 1 0 WDR: Watch Dog Timer Reset. When system reset by Watch Dog Timer overflow, WDR will be set to 1. ISPE: ISP function enable bit OME: 768 bytes on-chip RAM enable bit . ALEI: ALE output inhibit bit, to reduce EMI . Setting bit 0 (ALEI) of SCONF can inhibit the clock signal in Fosc/6Hz output to the ALE pin. The bit 1 (OME) of SCONF can enable or disable the on-chip expanded 768 byte RAM. The default setting of OME bit is 1 (enable). The bit 7 (WDR) of SCONF is Watch Dog Timer Reset bit. It will be set to 1 when reset signal generated by WDT overflow. User should check WDR bit whenever un-predicted reset happened. 2. In-System Programming (ISP) Function The SM59364 can generate flash control signal by internal hardware circuit. User utilize flash control register, flash address register and flash data register to perform the ISP function without removing the SM59364 from the system. The SM59364 provides internal flash control signals which can do flash program/chip erase/page erase/protect functions. User need to design and use any kind of interface which SM59364 can input data. User then utilize ISP service program to perform the flash program/chip erase/page erase/protect functions. 2.1 ISP Service Program The ISP service program is a user developed firmware program which resides in the ISP service program space. After user developed the ISP service program, user then determine the size of the ISP service program. User need to program the ISP service program in the SM59364 for the ISP purpose. The ISP service program were developed by user so that it should includes any features which relates to the flash memory programming function as well as communication protocol between SM59364 and host device which output data to the SM59364. For example, if user utilize UART interface to receive/transmit data between SM59364 and host |
类似零件编号 - SM59364 |
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类似说明 - SM59364 |
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