CS2100-OTP

DS841F1

7

AC ELECTRICAL CHARACTERISTICS

Notes: 5.

6.

7.

In accordance with AES-12id-2006 section 3.4.2. Measurements are Time Interval Error taken with 3rd

order 100 Hz to 40 kHz bandpass filter.

8.

In accordance with AES-12id-2006 section 3.4.1. Measurements are Time Interval Error taken with 3rd

order 100 Hz Highpass filter.

9.

10. The frequency accuracy of the PLL clock output is directly proportional to the frequency accuracy of the

reference clock.

Parameters

Symbol

Conditions

Min

Typ

Max

Units

Crystal Frequency

Fundamental Mode XTAL

RefClkDiv[1:0] = 10

RefClkDiv[1:0] = 01

RefClkDiv[1:0] = 00

8

16

32

-

-

-

18.75

37.5

50

MHz

MHz

MHz

Reference Clock Input Frequency

RefClkDiv[1:0] = 10

RefClkDiv[1:0] = 01

RefClkDiv[1:0] = 00

8

16

32

-

-

-

18.75

37.5

75

MHz

MHz

MHz

Reference Clock Input Duty Cycle

45

-

55

%

Internal System Clock Frequency

8

18.75

MHz

Clock Input Frequency

50 Hz

-

30

MHz

2

10

-

-

-

-

UI

ns

PLL Clock Output Frequency

6-

75

MHz

PLL Clock Output Duty Cycle

Measured at VD/2

45

50

55

%

Clock Output Rise Time

20% to 80% of VD

-

1.7

3.0

ns

Clock Output Fall Time

80% to 20% of VD

-

1.7

3.0

ns

Period Jitter

-

70

-

ps rms

Base Band Jitter (100 Hz to 40 kHz)

-

50

-

ps rms

Wide Band JItter (100 Hz Corner)

-

175

-

ps rms

-

-

100

1

200

3

UI

ms

PLL Lock Time - REF_CLK

-

1

3

ms

High Resolution

High Multiplication

0

0

-

-

±0.5

±112

ppm

ppm