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CS2000P-CZZR 数据表(PDF) 10 Page - Cirrus Logic |
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CS2000P-CZZR 数据表(HTML) 10 Page - Cirrus Logic |
10 / 30 page CS2000-OTP 10 DS758F1 Figure 6. Hybrid Analog-Digital PLL 4.2.1 Fractional-N Source Selection for the Frequency Synthesizer The fractional-N value for the frequency synthesizer can be sourced from either a static ratio or a dynamic ratio generated from the digital PLL (see Figure 7). This allows for the selection between operating in the static ratio based Frequency Synthesizer Mode as a simple frequency synthesizer (for frequency gener- ation from the Timing Reference Clock) and in the dynamic ratio based Hybrid PLL Mode (for jitter reduc- tion and clock multiplication). Selection between these two modes can either be made automatically based on the presence of the Frequency Reference Clock or manually through the mode select pins. Figure 7. Fractional-N Source Selection Overview N Digital Filter Frequency Comparator for Frac-N Generation Frequency Reference Clock Delta-Sigma Fractional-N Frequency Synthesizer Digital PLL and Fractional-N Logic Output to Input Ratio for Hybrid mode Fractional-N Divider Timing Reference Clock PLL Output Voltage Controlled Oscillator Internal Loop Filter Phase Comparator Delta-Sigma Modulator Frequency Reference Clock Output to Input ratio for Hybrid Mode Timing Reference Clock PLL Output Fractional-N Frequency Synthesizer Digital PLL & Fractional-N Logic Output to Input Ratio for Synthesizer Mode N |
类似零件编号 - CS2000P-CZZR |
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类似说明 - CS2000P-CZZR |
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