6

FN6691.0

March 3, 2009

2. Interrupt flag; Bit 2. This is the status bit of the interrupt.

The bit is set to logic high when the interrupt thresholds

have been triggered (out of threshold window), and logic

low when not yet triggered. Once activated and the

interrupt is triggered, the INT pin goes low and the

interrupt status bit goes high until the status bit is polled

the interrupt status bit are automatically cleared at the

end of the 8-bit (00h) command register transfer.

3. Interrupt persist; Bits 1 and 0. The interrupt pin and the

interrupt flag are triggered/set when the data sensor

reading is out of the interrupt threshold window after m

consecutive number of integration cycles. The interrupt

persist bits determine m.

Command Register II 01(hex)

The second command register has the following functions:

1. Resolution: Bits 3 and 2. Bits 3 and 2 determine the ADC’s

resolution and the number of clock cycles per conversion.

Changing the number of clock cycles does more than just

change the resolution of the device; it also changes the

integration time, which is the period the device’s analog-to-

digital (A/D) converter samples the photodiode current

signal for a measurement.

.

2. Range: Bits 1 and 0. The Full Scale Range (FSR) can be

possible values of FSR for the 499k

Data Registers (02 hex and 03 hex)

The device has two 8-bit read-only registers to hold the data

from LSB to MSB for ADC. The most significant bit (MSB) is

accessed at 03 hex, and the least significant bit (LSB) is

accessed at 02 hex. For 16-bit resolution, the data is from

D0 to D15; for 12-bit resolution, the data is from D0 to D11;

for 8-bit resolution, the data is from D0 to D7. The registers

are refreshed after every conversion cycle.

Interrupt Registers (04, 05, 06 and 07 hex)

Registers 04 and 05 hex set the low (LO) threshold for the

interrupt pin and the interrupt flag. 04 hex is the LSB and 05

hex is the MSB. By default, the Interrupt threshold LO is 00

hex for both LSB and MSB.

Registers 06 and 07 hex set the high (HI) threshold for the

interrupt pin and the interrupt flag. 06 hex is the LSB and 07

hex is the MSB. By default, the Interrupt threshold HI is FF

hex for both LSB and MSB.

Calculating Lux

The ISL29023’s ADC output codes, DATA, are directly

proportional to lux in the ambient light sensing.

determined by the Full Scale Range and the ADC’s

maximum output counts. The constant is independent of the

light sources (fluorescent, incandescent and sunlight)

because the light sources’ IR component is removed during

the light signal process. The constant can also be viewed as

the sensitivity (the smallest lux measurement the device can

measure).

maximum output counts from the ADC.

The transfer function used for n-bits ADC becomes:

Here, n = 4, 8, 12 or 16. This is the number of ADC bits

maximum number of counts possible from the ADC output.

Data is the ADC output stored in the data registers (02 hex

and 03 hex).

TABLE 3. INTERRUPT FLAG

BIT 2

OPERATION

0

Interrupt is cleared or not triggered yet

1

Interrupt is triggered

TABLE 4. INTERRUPT PERSIST

BIT 1:0

NUMBER OF INTEGRATION CYCLES

00

1

01

4

10

8

11

16

TABLE 5. ADC RESOLUTION DATA WIDTH

BITS 3:2

NUMBER OF CLOCK CYCLES

n-BIT ADC

00

16

01

12

10

8

11

4

TABLE 6. RANGE/FSR LUX

BITS

1:0

k

RANGE(k)

FSR (LUX) @

ALS SENSING

FSR @ IR

SENSING

00

1

Range1

1,000

Refer to page 3

01

2

Range2

4,000

Refer to page 3

10

3

Range3

16,000

Refer to page 3

11

4

Range4

64,000

Refer to page 3

TABLE 7. DATA REGISTERS

ADDRESS

(hex)

CONTENTS

02

D0 is LSB for 4, 8, 12 or 16-bit resolution; D3 is MSB for

4-bit resolution; D7 is MSB for 8-bit resolution

03

D15 is MSB for 16-bit resolution; D11 is MSB for 12-bit

resolution

α DATA

×

=

(EQ. 1)

α

Range k

()

----------------------------

=

(EQ. 2)

(EQ. 3)

Range k

()

2

n

---------------------------

DATA

×

=

ISL29023