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TPS1100 数据表(PDF) 1 Page - Texas Instruments |
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TPS1100 数据表(HTML) 1 Page - Texas Instruments |
1 / 10 page TPS1100, TPS1100Y SINGLE P-CHANNEL ENHANCEMENT-MODE MOSFETS SLVS078C – DECEMBER 1993 – REVISED AUGUST 1995 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Low rDS(on) . . . 0.18 Ω Typ at VGS = –10 V D 3 V Compatible D Requires No External VCC D TTL and CMOS Compatible Inputs D VGS(th) = –1.5 V Max D Available in Ultrathin TSSOP Package (PW) D ESD Protection Up to 2 kV Per MIL-STD-883C, Method 3015 description The TPS1100 is a single P-channel enhancement-mode MOSFET. The device has been optimized for 3-V or 5-V power distribution in battery-powered systems by means of Texas Instruments LinBiCMOS ™ process. With a maximum VGS(th) of –1.5 V and an IDSS of only 0.5 µA, the TPS1100 is the ideal high-side switch for low-voltage, portable battery-management systems where maximizing battery life is a primary concern. The low rDS(on) and excellent ac characteristics (rise time 10 ns typical) make the TPS1100 the logical choice for low-voltage switching applications such as power switches for pulse-width-modulated (PWM) controllers or motor/bridge drivers. The ultrathin thin shrink small-outline package or TSSOP (PW) version with its smaller footprint and reduction in height fits in places where other P-channel MOSFETs cannot. The size advantage is especially important where board real estate is at a premium and height restrictions do not allow for a small-outline integrated circuit (SOIC) package. AVAILABLE OPTIONS PACKAGED DEVICES CHIP FORM TA SMALL OUTLINE (D) PLASTIC DIP (P) CHIP FORM (Y) –40 °C to 85°C TPS1100D TPS1100PWLE TPS1100Y The D package is available taped and reeled. Add an R suffix to device type (e.g., TPS1100DR). The PW package is available only left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TPS1100PWLE). The chip form is tested at 25 °C. Caution. This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated voltages to these high-impedance circuits. LinBiCMOS is a trademark of Texas Instruments Incorporated. Copyright © 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 8 7 6 5 SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN D OR PW PACKAGE (TOP VIEW) D PACKAGE PW PACKAGE SOURCE DRAIN GATE ESD- Protection Circuitry NOTE A: For all applications, all source pins should be connected and all drain pins should be connected. schematic |
类似零件编号 - TPS1100 |
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类似说明 - TPS1100 |
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