TP3064B, TP3067B, TP13064B, TP13067B

MONOLITHIC SERIAL INTERFACE

COMBINED PCM CODEC AND FILTER

SCTS031D – MAY 1990 –REVISED JULY 1996

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POST OFFICE BOX 655303

Systems Include:

– Transmit High-Pass and Low-Pass

Filtering

– Receive Low-Pass Filter With (sin x)/x

Correction

– Active RC Noise Filters

–

µ-Law or A-Law Compatible Coder and

Decoder

– Internal Precision Voltage Reference

– Serial I/O Interface

– Internal Autozero Circuitry

Density

Semiconductor TP3064, TP3067, TP3064-X,

and TP3067-X

description

The

TP3064B,

TP3067B,

TP13064B,

and

TP13067B each comprise a single-chip pulse-

code-modulation encoder and decoder (PCM

codec), and PCM line filter. They also provide

band-pass filtering of the analog signals prior to

the encoding, and low-pass filtering after the

decoding of voice signals and call-progress tones.

All the functions required to interface a full-duplex

(2-wire) voice telephone circuit with a time-divi-

sion-multiplexed (TDM) system are included

on-chip. These devices are pin-for-pin compatible

with the National Semiconductor TP3064 and

TP3067. Primary applications include:

switching of T1 carrier, PABX (private

automated branch exchange), and central

office telephone systems

These devices are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A

conversion) as well as the transmit and receive filtering functions in a PCM system, and are intended to be used

at the analog termination of a PCM line or trunk. They require a transmit master clock and a receive master clock

that may be asynchronous (1.536 MHz, 1.544 MHz, or 2.048 MHz), transmit and receive data clocks that are

synchronous with the master clock (but can vary from 64 kHz to 2.048 MHz), and transmit and receive

frame-sync pulses. The TP3064B and TP13064B contain patented circuitry to achieve low transmit channel

idle noise and are not recommended for applications in which the composite signals on the transmit side are

below – 55 dBm0.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the CMOS gates.

Copyright

© 1996, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

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VPO+

ANLG GND

VPO –

VPI

VFRO

FSR

DR

BCLKR/CLKSEL

MCLKR/PDN

VFXI+

VFXI –

GSX

ANLG LOOP

TSX

FSX

DX

BCLKX

MCLKX

DW OR N PACKAGE

(TOP VIEW)