SN54BCT8245A, SN74BCT8245A

SCAN TEST DEVICES

WITH OCTAL BUS TRANSCEIVERS

SCBS043E – MAY 1990 – REVISED JULY 1996

9

POST OFFICE BOX 655303

data register description

boundary-scan register

The boundary-scan register (BSR) is 18 bits long. It contains one boundary-scan cell (BSC) for each

normal-function input pin and one BSC for each normal-function output pin. Which I/O ports, A or B, function

as input terminals and which function as output terminals is determined by the DIR signal (BSC17) as described

below. The BSR is used 1) to store test data that is to be applied internally to the inputs of the normal on-chip

logic and/or externally to the device output terminals, and/or 2) to capture data that appears internally at the

outputs of the normal on-chip logic and/or externally at the device input terminals.

The source of data to be captured into the BSR during Capture-DR is determined by the current instruction. The

contents of the BSR may change during Run-Test/Idle, as determined by the current instruction. The contents

of the BSR are not changed in Test-Logic-Reset.

The BSR order of scan is from TDI through bits 17–0 to TDO. Table 1 shows the BSR bits and their associated

device pin signals. The device signals I1–I8 and O1–O8 represent data input signals and data output signals,

respectively. The direction control signal (DIR) as output by BSC17 determines which port, A or B, is considered

an input and which is considered an output. When the output of BSC17 is logic 0, the device signals I1–I8 are

associated with I/O ports B1–B8, while device signals O1–O8 are associated with I/O ports A1–A8. When the

output of BSC17 is logic 1, the converse is true (that is, I1–I8 are associated with A1–A8, while O1–O8 are

associated with B1–B8). In normal-function mode, the output of the BSC17 input is equivalent to the input signal

present at the DIR input pin.

Table 1. Boundary-Scan Register Configuration

BSR BIT

NUMBER

DEVICE

SIGNAL

BSR BIT

NUMBER

DEVICE

SIGNAL

BSR BIT

NUMBER

DEVICE

SIGNAL

17

DIR

15

I1

7

O1

16

OE

14

I2

6

O2

–

–

13

I3

5

O3

–

–

12

I4

4

O4

–

–

11

I5

3

O5

–

–

10

I6

2

O6

–

–

9

I7

1

O7

–

–

8

I8

0

O8

boundary-control register

The boundary-control register (BCR) is two bits long. The BCR is used in the context of the RUNT instruction

to implement additional test operations not included in the basic SCOPE

™ instruction set. Such operations

include PRPG and PSA. Table 3 shows the test operations that are decoded by the BCR.

During Capture-DR, the contents of the BCR are not changed. At power up or in Test-Logic-Reset, the BCR is

reset to the binary value 10, which selects the PSA test operation. The BCR order of scan is shown in Figure 3.

TDO

TDI

Bit 0

(LSB)

Bit 1

(MSB)

Figure 3. Boundary-Control Register Order of Scan