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SM320C6201BGLP 数据表(PDF) 2 Page - Texas Instruments |
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SM320C6201BGLP 数据表(HTML) 2 Page - Texas Instruments |
2 / 62 page SM320C6201B, SMJ320C6201B DIGITAL SIGNAL PROCESSOR SGUS031 – APRIL 2000 2 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 description The 320C6201B DSP is a member of the fixed-point DSP family in the 320C6000 platform. The SM/SMJ320C6201B (’C6201B) device is based on the high-performance, advanced VelociTI very-long-instruction-word (VLIW) architecture developed by Texas Instruments (TI ™), making this DSP an excellent choice for multichannel and multifunction applications. With performance of up to 1600 million instructions per second (MIPS) at a clock rate of 200 MHz, the ’C6201B offers cost-effective solutions to high-performance DSP programming challenges. The ’C6201B is a newer revision of the ’C6201. The ’C6201B DSP possesses the operational flexibility of high-speed controllers and the numerical capability of array processors. This processor has 32 general-purpose registers of 32-bit word length and eight highly independent functional units. The eight functional units provide six arithmetic logic units (ALUs) for a high degree of parallelism and two 16-bit multipliers for a 32-bit result. The ’C6201B can produce two multiply-accumulates (MACs) per cycle—for a total of 400 million MACs per second (MMACS). The ’C6201B DSP also has application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The ’C6201B includes a large bank of on-chip memory and has a powerful and diverse set of peripherals. Program memory consists of a 64K-byte block that is user-configurable as cache or memory-mapped program space. Data memory of the ’C6201B consists of two 32K-byte blocks of RAM for improved concurrency. The peripheral set includes two multichannel buffered serial ports (McBSPs), two general-purpose timers, a host-port interface (HPI), and a glueless external memory interface (EMIF) capable of interfacing to SDRAM or SBSRAM and asynchronous peripherals. The ’C6201B has a complete set of development tools which includes: a new C compiler, a third-party Ada 95 compiler, an assembly optimizer to simplify programming and scheduling, and a Windows ™ debugger interface for visibility into source code execution. device characteristics Table 1 provides an overview of the ’C62x DSP. The table shows significant features of each device, including the capacity of on-chip RAM, the peripherals, the execution time, and the package type with pin count. Table 1. Characteristics of the ’C6201B Processor CHARACTERISTICS DESCRIPTION Device Number 320C6201B On-Chip Memory 512-Kbit Program Memory 512-Kbit Data Memory (organized as two blocks) Peripherals 2 Multichannel Buffered Serial Ports (McBSPs) 2 General-Purpose Timers Host-Port Interface (HPI) External Memory Interface (EMIF) Cycle Time 6.7 ns (320C6201B 150 MHz), 5 ns (320C6201B 200 MHz) Package Type 27 mm × 27 mm, 429-Pin Ceramic D-BGA (GLP) Nominal Voltage 1.8 V Core 3.3 V I/O TI is a trademark of Texas Instruments Incorporated. Windows is a registered trademark of the Microsoft Corporation. |
类似零件编号 - SM320C6201BGLP |
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类似说明 - SM320C6201BGLP |
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