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ISL34341INZ 数据表(PDF) 10 Page - Intersil Corporation |
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ISL34341INZ 数据表(HTML) 10 Page - Intersil Corporation |
10 / 11 page 10 All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6827.0 December 15, 2008 micro-controller on each side of the of the link data can be buffered and exchanged between the two. Up to 224 bytes can be sent in each direction during each VSYNC active period. Master Mode This is a mode activated by strapping the MASTER pin to a ‘1’ on the 34341 on the remote side of the controller. This is a virtual extension of the I2C interface across the link that allows the local processor to read and write slave devices connected to the remote side I2C bus. No additional wires or components are needed other than the serial link. The I2C commands and data are transferred during video blanking causing no interruptions in the video data. Data is transported by the Side Channel across the link so the maximum throughput would be the same. ISL34341 |
类似零件编号 - ISL34341INZ |
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类似说明 - ISL34341INZ |
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