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74AC16245 数据表(PDF) 5 Page - Texas Instruments |
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74AC16245 数据表(HTML) 5 Page - Texas Instruments |
5 / 6 page 54AC16245, 74AC16245 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS235A – MARCH 1990 – REVISED APRIL 1996 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 operating characteristics, VCC = 5 V, TA = 25°C PARAMETER TEST CONDITIONS TYP UNIT C d Power dissipation capacitance per latch Outputs enabled CL =50 pF f = 1 MHz 43 pF Cpd Power dissipation capacitance per latch Outputs disabled CL = 50 pF, f = 1 MHz 8 pF PARAMETER MEASUREMENT INFORMATION From Output Under Test CL = 50 pF (see Note A) LOAD CIRCUIT S1 2 × VCC 500 Ω 500 Ω tPLH tPHL Output Control (low-level enabling) Output Waveform 1 S1 at 2 × VCC (see Note B) Output Waveform 2 S1 at GND (see Note B) VOL VOH tPZL tPZH tPLZ tPHZ 50% 50% 50% 50% [ VCC VCC 0 V 50% VCC 50% VCC VOH VOL 0 V 50% VCC 20% VCC 50% VCC 80% VCC [ 0 V VCC GND Open Input Output VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND TEST S1 NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 3 ns, tf = 3 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms |
类似零件编号 - 74AC16245 |
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类似说明 - 74AC16245 |
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