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74LVCH16245ADGG 数据表(PDF) 10 Page - NXP Semiconductors |
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74LVCH16245ADGG 数据表(HTML) 10 Page - NXP Semiconductors |
10 / 19 page 74LVC_LVCH16245A_8 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 08 — 6 November 2008 10 of 19 NXP Semiconductors 74LVC16245A; 74LVCH16245A 16-bit bus transceiver with direction pin; 5 V tolerant; 3-state [1] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] Typical values are measured at Tamb =25 °C and VCC = 3.3 V. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching Σ(C L × VCC 2 × f o) = sum of the outputs. 11. Waveforms CPD power dissipation capacitance per buffer; VI = GND to VCC [3] VCC = 3.3 V - 30 - - - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V). For test circuit see Figure 9. Symbol Parameter Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. The input (nAn, nBn) to output (nBn, nAn) propagation delays mna477 nAn, nBn input nBn, nAn output tPHL tPLH GND VI VM VM VOH VOL |
类似零件编号 - 74LVCH16245ADGG |
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类似说明 - 74LVCH16245ADGG |
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